公开(公告)号：US08139397B2

公开(公告)日：2012-03-20

申请号：US12968438

申请日：2010-12-15

申请人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

发明人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

IPC分类号： G11C11/00

CPC分类号： G11C5/025 ,  G11C11/1653 ,  G11C11/1673

摘要： The present disclosure relates to methods of selectively placing a reference column or reference row in a memory array. The method includes measuring a resistance state resistance value for a plurality of variable resistive memory cells within a memory array and mapping a location of each measured variable resistive memory cell to form a map of the resistance state resistance values for a plurality of variable resistive memory cells within a memory array. Then a column or row is selected to be a reference column or reference row based on the map of the resistance state resistance value for a plurality of variable resistive memory cells within a memory array, to minimize read operation errors, and forming a variable resistive memory cell memory array.

摘要翻译： 本公开涉及将参考列或参考行选择性地放置在存储器阵列中的方法。 该方法包括测量存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值，并映射每个测量的可变电阻存储单元的位置，以形成多个可变电阻存储单元的电阻状态电阻值的映射 在内存阵列内。 然后，基于存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值的映射来选择列或行作为参考列或参考行，以最小化读取操作错误，以及形成可变电阻存储器 单元存储器阵列。

公开(公告)号：US07876599B2

公开(公告)日：2011-01-25

申请号：US12398256

申请日：2009-03-05

申请人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

发明人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

IPC分类号： G11C11/00

CPC分类号： G11C5/025 ,  G11C11/1653 ,  G11C11/1673

摘要： The present disclosure relates to methods of selectively placing a reference column or reference row in a memory array. The method includes measuring a resistance state resistance value for a plurality of variable resistive memory cells within a memory array and mapping a location of each measured variable resistive memory cell to form a map of the resistance state resistance values for a plurality of variable resistive memory cells within a memory array. Then a column or row is selected to be a reference column or reference row based on the map of the resistance state resistance value for a plurality of variable resistive memory cells within a memory array, to minimize read operation errors, and forming a variable resistive memory cell memory array.

摘要翻译： 本公开涉及将参考列或参考行选择性地放置在存储器阵列中的方法。 该方法包括测量存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值，并映射每个测量的可变电阻存储单元的位置，以形成多个可变电阻存储单元的电阻状态电阻值的映射 在内存阵列内。 然后，基于存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值的映射来选择列或行作为参考列或参考行，以最小化读取操作错误，以及形成可变电阻存储器 单元存储器阵列。

公开(公告)号：US20100110760A1

公开(公告)日：2010-05-06

申请号：US12390728

申请日：2009-02-23

申请人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

发明人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

IPC分类号： G11C11/00 ,  G11C11/416 ,  G11C7/00 ,  G11C11/24

CPC分类号： G11C13/004 ,  G11C11/1673 ,  G11C27/02 ,  G11C2013/0057 ,  G11C2207/2254

摘要： Resistive memory calibration for self-reference read methods are described. One method of self-reference reading a resistive memory unit includes setting a plurality of resistive memory units to a first resistive data state. The resistive memory units forms a memory array. Reading a sensed resistive data state for each resistive memory unit by applying a first read current and a second read current through each resistive memory unit and then comparing voltages formed by the first read current and the second read current to determine the sensed resistive data state for each resistive memory unit. Then the method includes adjusting the first or the second read current, read voltages, or storage device capacitance for each resistive memory unit where the sensed resistive data state was not the same as the first resistive data state until the sensed resistive data state is the same as the first resistive data state.

摘要翻译： 描述了自参考读取方法的电阻记忆校准。 读取电阻性存储器单元的一种自参考方法包括将多个电阻存储器单元设置为第一电阻数据状态。 电阻存储器单元形成存储器阵列。 通过施加第一读取电流和第二读取电流通过每个电阻性存储器单元，然后比较由第一读取电流和第二读取电流形成的电压，来为每个电阻性存储器单元读取感测的电阻数据状态，以确定感测的电阻数据状态 每个电阻存储器单元。 然后，该方法包括调整每个电阻性存储器单元的第一或第二读取电流，读取电压或存储器件电容，其中感测的电阻数据状态与第一电阻数据状态不同，直到感测的电阻数据状态相同 作为第一电阻数据状态。

公开(公告)号：US08213215B2

公开(公告)日：2012-07-03

申请号：US13015085

申请日：2011-01-27

申请人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

发明人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

IPC分类号： G11C11/00 ,  G11C5/14 ,  G11C7/06

CPC分类号： G11C13/004 ,  G11C11/1673 ,  G11C27/02 ,  G11C2013/0057 ,  G11C2207/2254

摘要： Resistive memory calibration for self-reference read methods are described. One method of self-reference reading a resistive memory unit includes setting a plurality of resistive memory units to a first resistive data state. The resistive memory units forms a memory array. Reading a sensed resistive data state for each resistive memory unit by applying a first read current and a second read current through each resistive memory unit and then comparing voltages formed by the first read current and the second read current to determine the sensed resistive data state for each resistive memory unit. Then the method includes adjusting the first or the second read current, read voltages, or storage device capacitance for each resistive memory unit where the sensed resistive data state was not the same as the first resistive data state until the sensed resistive data state is the same as the first resistive data state.

摘要翻译： 描述了自参考读取方法的电阻记忆校准。 读取电阻性存储器单元的一种自参考方法包括将多个电阻存储器单元设置为第一电阻数据状态。 电阻存储器单元形成存储器阵列。 通过施加第一读取电流和第二读取电流通过每个电阻性存储器单元，然后比较由第一读取电流和第二读取电流形成的电压，来为每个电阻性存储器单元读取感测的电阻数据状态，以确定感测的电阻数据状态 每个电阻存储器单元。 然后，该方法包括调整每个电阻性存储器单元的第一或第二读取电流，读取电压或存储器件电容，其中感测的电阻数据状态与第一电阻数据状态不同，直到感测的电阻数据状态相同 作为第一电阻数据状态。

公开(公告)号：US20110122679A1

公开(公告)日：2011-05-26

申请号：US13015085

申请日：2011-01-27

申请人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

发明人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

IPC分类号： G11C11/00

CPC分类号： G11C13/004 ,  G11C11/1673 ,  G11C27/02 ,  G11C2013/0057 ,  G11C2207/2254

摘要： Resistive memory calibration for self-reference read methods are described. One method of self-reference reading a resistive memory unit includes setting a plurality of resistive memory units to a first resistive data state. The resistive memory units forms a memory array. Reading a sensed resistive data state for each resistive memory unit by applying a first read current and a second read current through each resistive memory unit and then comparing voltages formed by the first read current and the second read current to determine the sensed resistive data state for each resistive memory unit. Then the method includes adjusting the first or the second read current, read voltages, or storage device capacitance for each resistive memory unit where the sensed resistive data state was not the same as the first resistive data state until the sensed resistive data state is the same as the first resistive data state.

摘要翻译： 描述了自参考读取方法的电阻记忆校准。 读取电阻性存储器单元的一种自参考方法包括将多个电阻存储器单元设置为第一电阻数据状态。 电阻存储器单元形成存储器阵列。 通过施加第一读取电流和第二读取电流通过每个电阻性存储器单元，然后比较由第一读取电流和第二读取电流形成的电压，来为每个电阻式存储器单元读取感测的电阻数据状态，以确定感测的电阻数据状态 每个电阻存储器单元。 然后，该方法包括调整每个电阻性存储器单元的第一或第二读取电流，读取电压或存储器件电容，其中感测的电阻数据状态与第一电阻数据状态不同，直到感测的电阻数据状态相同 作为第一电阻数据状态。

公开(公告)号：US07898838B2

公开(公告)日：2011-03-01

申请号：US12390728

申请日：2009-02-23

申请人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

发明人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

IPC分类号： G11C11/00 ,  G11C7/06 ,  G11C5/14

CPC分类号： G11C13/004 ,  G11C11/1673 ,  G11C27/02 ,  G11C2013/0057 ,  G11C2207/2254

摘要： Resistive memory calibration for self-reference read methods are described. One method of self-reference reading a resistive memory unit includes setting a plurality of resistive memory units to a first resistive data state. The resistive memory units forms a memory array. Reading a sensed resistive data state for each resistive memory unit by applying a first read current and a second read current through each resistive memory unit and then comparing voltages formed by the first read current and the second read current to determine the sensed resistive data state for each resistive memory unit. Then the method includes adjusting the first or the second read current, read voltages, or storage device capacitance for each resistive memory unit where the sensed resistive data state was not the same as the first resistive data state until the sensed resistive data state is the same as the first resistive data state.

摘要翻译： 描述了自参考读取方法的电阻记忆校准。 读取电阻性存储器单元的一种自参考方法包括将多个电阻存储器单元设置为第一电阻数据状态。 电阻存储器单元形成存储器阵列。 通过施加第一读取电流和第二读取电流通过每个电阻性存储器单元，然后比较由第一读取电流和第二读取电流形成的电压，来为每个电阻性存储器单元读取感测的电阻数据状态，以确定感测的电阻数据状态 每个电阻存储器单元。 然后，该方法包括调整每个电阻性存储器单元的第一或第二读取电流，读取电压或存储器件电容，其中感测的电阻数据状态与第一电阻数据状态不同，直到感测的电阻数据状态相同 作为第一电阻数据状态。

公开(公告)号：US20100110761A1

公开(公告)日：2010-05-06

申请号：US12398256

申请日：2009-03-05

申请人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

发明人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

IPC分类号： G11C11/00

CPC分类号： G11C5/025 ,  G11C11/1653 ,  G11C11/1673

摘要： The present disclosure relates to methods of selectively placing a reference column or reference row in a memory array. The method includes measuring a resistance state resistance value for a plurality of variable resistive memory cells within a memory array and mapping a location of each measured variable resistive memory cell to form a map of the resistance state resistance values for a plurality of variable resistive memory cells within a memory array. Then a column or row is selected to be a reference column or reference row based on the map of the resistance state resistance value for a plurality of variable resistive memory cells within a memory array, to minimize read operation errors, and forming a variable resistive memory cell memory array.

摘要翻译： 本公开涉及将参考列或参考行选择性地放置在存储器阵列中的方法。 该方法包括测量存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值，并映射每个测量的可变电阻存储单元的位置，以形成多个可变电阻存储单元的电阻状态电阻值的映射 在内存阵列内。 然后，基于存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值的映射来选择列或行作为参考列或参考行，以最小化读取操作错误，以及形成可变电阻存储器 单元存储器阵列。

公开(公告)号：US20120163065A1

公开(公告)日：2012-06-28

申请号：US13410783

申请日：2012-03-02

申请人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

发明人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

IPC分类号： G11C11/00

CPC分类号： G11C5/025 ,  G11C11/1653 ,  G11C11/1673

摘要： The present disclosure relates to methods of selectively placing a reference column or reference row in a memory array. The method includes measuring a resistance state resistance value for a plurality of variable resistive memory cells within a memory array and mapping a location of each measured variable resistive memory cell to form a map of the resistance state resistance values for a plurality of variable resistive memory cells within a memory array. Then a column or row is selected to be a reference column or reference row based on the map of the resistance state resistance value for a plurality of variable resistive memory cells within a memory array, to minimize read operation errors, and forming a variable resistive memory cell memory array.

摘要翻译： 本公开涉及将参考列或参考行选择性地放置在存储器阵列中的方法。 该方法包括测量存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值，并映射每个测量的可变电阻存储单元的位置，以形成多个可变电阻存储单元的电阻状态电阻值的映射 在内存阵列内。 然后，基于存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值的映射来选择列或行作为参考列或参考行，以最小化读取操作错误，以及形成可变电阻存储器 单元存储器阵列。

公开(公告)号：US08526215B2

公开(公告)日：2013-09-03

申请号：US13410783

申请日：2012-03-02

申请人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

发明人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

IPC分类号： G11C11/00

CPC分类号： G11C5/025 ,  G11C11/1653 ,  G11C11/1673

摘要： The present disclosure relates to methods of selectively placing a reference column or reference row in a memory array. The method includes measuring a resistance state resistance value for a plurality of variable resistive memory cells within a memory array and mapping a location of each measured variable resistive memory cell to form a map of the resistance state resistance values for a plurality of variable resistive memory cells within a memory array. Then a column or row is selected to be a reference column or reference row based on the map of the resistance state resistance value for a plurality of variable resistive memory cells within a memory array, to minimize read operation errors, and forming a variable resistive memory cell memory array.

摘要翻译： 本公开涉及将参考列或参考行选择性地放置在存储器阵列中的方法。 该方法包括测量存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值，并映射每个测量的可变电阻存储单元的位置，以形成多个可变电阻存储单元的电阻状态电阻值的映射 在内存阵列内。 然后，基于存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值的映射来选择列或行作为参考列或参考行，以最小化读取操作错误，以及形成可变电阻存储器 单元存储器阵列。

公开(公告)号：US20110080769A1

公开(公告)日：2011-04-07

申请号：US12968438

申请日：2010-12-15

申请人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

发明人： Yiran Chen ,  Hai Li ,  Wenzhong Zhu ,  Xiaobin Wang ,  Henry Huang ,  Hongyue Liu

IPC分类号： G11C11/00

CPC分类号： G11C5/025 ,  G11C11/1653 ,  G11C11/1673

摘要： The present disclosure relates to methods of selectively placing a reference column or reference row in a memory array. The method includes measuring a resistance state resistance value for a plurality of variable resistive memory cells within a memory array and mapping a location of each measured variable resistive memory cell to form a map of the resistance state resistance values for a plurality of variable resistive memory cells within a memory array. Then a column or row is selected to be a reference column or reference row based on the map of the resistance state resistance value for a plurality of variable resistive memory cells within a memory array, to minimize read operation errors, and forming a variable resistive memory cell memory array.

摘要翻译： 本公开涉及将参考列或参考行选择性地放置在存储器阵列中的方法。 该方法包括测量存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值，并映射每个测量的可变电阻存储单元的位置，以形成多个可变电阻存储单元的电阻状态电阻值的映射 在内存阵列内。 然后，基于存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值的映射来选择列或行作为参考列或参考行，以最小化读取操作错误，以及形成可变电阻存储器 单元存储器阵列。