公开(公告)号：US20080111626A1

公开(公告)日：2008-05-15

申请号：US11978650

申请日：2007-10-30

申请人： Kun-Tsung Lin

发明人： Kun-Tsung Lin

IPC分类号： H03F3/45

CPC分类号： H03F3/3022 ,  H03F3/4521 ,  H03F3/45219 ,  H03F3/45237 ,  H03F2203/45236 ,  H03F2203/45244 ,  H03F2203/45271 ,  H03F2203/45272 ,  H03F2203/45281 ,  H03F2203/45318 ,  H03F2203/45632

摘要： A rail-to-rail class-AB operational amplifier includes a first differential pair unit for receiving a pair of differential signals and generating a first control signal; a second differential pair unit for receiving the pair of differential signals and generating a second control signal; and an output stage for receiving the first control signal and the second control signal and then generating an output voltage. The first differential pair unit includes a first active load, a first transistor differential pair and a first current source. The second differential pair unit includes a second current source, a second transistor differential pair and a second active load. The output stage includes a third current source, a fourth current source and a parallel transistor pair disposed between a second terminal of the third current source and a first terminal of the fourth current source, a first output transistor and a second output transistor, and generates the output voltage according to the first control signal and the second control signal.

摘要翻译： 轨到轨AB类运算放大器包括：第一差分对单元，用于接收一对差分信号并产生第一控制信号; 第二差分对单元，用于接收所述一对差分信号并产生第二控制信号; 以及输出级，用于接收第一控制信号和第二控制信号，然后产生输出电压。 第一差分对单元包括第一有源负载，第一晶体管差分对和第一电流源。 第二差分对单元包括第二电流源，第二晶体管差分对和第二有源负载。 输出级包括第三电流源，第四电流源和设置在第三电流源的第二端和第四电流源的第一端之间的并联晶体管对，第一输出晶体管和第二输出晶体管，并且产生 根据第一控制信号和第二控制信号的输出电压。

公开(公告)号：US07508265B2

公开(公告)日：2009-03-24

申请号：US11978650

申请日：2007-10-30

申请人： Kun-Tsung Lin

发明人： Kun-Tsung Lin

IPC分类号： H03F3/45

CPC分类号： H03F3/3022 ,  H03F3/4521 ,  H03F3/45219 ,  H03F3/45237 ,  H03F2203/45236 ,  H03F2203/45244 ,  H03F2203/45271 ,  H03F2203/45272 ,  H03F2203/45281 ,  H03F2203/45318 ,  H03F2203/45632

摘要： A rail-to-rail class-AB operational amplifier includes a first differential pair unit for receiving a pair of differential signals and generating a first control signal; a second differential pair unit for receiving the pair of differential signals and generating a second control signal; and an output stage for receiving the first control signal and the second control signal and then generating an output voltage. The first differential pair unit includes a first active load, a first transistor differential pair and a first current source. The second differential pair unit includes a second current source, a second transistor differential pair and a second active load. The output stage includes a third current source, a fourth current source and a parallel transistor pair disposed between a second terminal of the third current source and a first terminal of the fourth current source, a first output transistor and a second output transistor, and generates the output voltage according to the first control signal and the second control signal.

摘要翻译： 轨到轨AB类运算放大器包括：第一差分对单元，用于接收一对差分信号并产生第一控制信号; 第二差分对单元，用于接收所述一对差分信号并产生第二控制信号; 以及输出级，用于接收第一控制信号和第二控制信号，然后产生输出电压。 第一差分对单元包括第一有源负载，第一晶体管差分对和第一电流源。 第二差分对单元包括第二电流源，第二晶体管差分对和第二有源负载。 输出级包括第三电流源，第四电流源和设置在第三电流源的第二端和第四电流源的第一端之间的并联晶体管对，第一输出晶体管和第二输出晶体管，并且产生 根据第一控制信号和第二控制信号的输出电压。

公开(公告)号：US06933784B2

公开(公告)日：2005-08-23

申请号：US10725358

申请日：2003-12-01

申请人： Sergey Alenin

发明人： Sergey Alenin

IPC分类号： H03F3/18

CPC分类号： H03F1/3211 ,  H03F3/45179 ,  H03F3/45475 ,  H03F2203/45112 ,  H03F2203/45188 ,  H03F2203/45244 ,  H03F2203/45272 ,  H03F2203/45356 ,  H03F2203/45646

摘要： A class-AB MOS output stage that provides higher gain and significantly lower distortion. The class-AB MOS output stage includes a PMOS output transistor and an NMOS output transistor coupled between positive and negative supply voltages such that the MOS output transistors operate in a common source mode, a first biased class-AB control circuit coupled between the output transistor gates, a first current source coupled between the gate of the PMOS output transistor and the positive supply, a second biased class-AB control circuit, and a second current source coupled between the second control circuit and the positive supply. The second class-AB control circuit is coupled between the second current source and a non-inverting input of the output stage. The gate of the NMOS output transistor is employed as the inverting input of the output stage, which further includes two differential amplifiers for controlling the first and second current sources. The class-AB MOS output stage has a fully symmetrical differential input-to-single-ended output circuit configuration, which allows corresponding sources of gain reduction and non-linearity to cancel out, thereby improving the performance of the output stage.

摘要翻译： A类MOS输出级，提供更高的增益和更低的失真。 AB类MOS输出级包括PMOS输出晶体管和耦合在正电源电压和负电源电压之间的NMOS输出晶体管，使得MOS输出晶体管以公共源模式工作，第一偏置AB类控制电路耦合在输出晶体管 栅极，耦合在PMOS输出晶体管的栅极和正电源之间的第一电流源，第二偏置AB类控制电路和耦合在第二控制电路和正电源之间的第二电流源。 第二类AB控制电路耦合在第二电流源和输出级的非反相输入端之间。 NMOS输出晶体管的栅极用作输出级的反相输入，其还包括用于控制第一和第二电流源的两个差分放大器。 AB类MOS输出级具有完全对称的差分输入到单端输出电路配置，允许相应的增益减小和非线性源消除，从而提高输出级的性能。

公开(公告)号：US5910736A

公开(公告)日：1999-06-08

申请号：US733636

申请日：1996-10-17

申请人： Junichi Nagata ,  Junji Hayakawa

发明人： Junichi Nagata ,  Junji Hayakawa

IPC分类号： H03K5/08 ,  H03F3/45 ,  H04L25/02 ,  H03K19/086

CPC分类号： H03F3/45085 ,  H03F3/45551 ,  H03F2203/45031 ,  H03F2203/45188 ,  H03F2203/45272 ,  H03F2203/45352 ,  H03F2203/45561 ,  H03F2203/45584 ,  H03F2203/45612 ,  H03F2203/45674

摘要： A differential-type data transmitter includes a differential amplifier pair (T1, T2, T4, T6, T8) having a plurality of transistors and receiving a pair of a first input signal and a second input signal. A load (T3, T5, T7) is connected to the differential amplifier pair. A detection circuit (T9, T10, I4, I5, I6, I7) connected to a junction between the differential amplifier pair and the load is operative for detecting whether or not the first and second input signals are outside a common-mode input voltage range with respect to the differential amplifier pair. A first output circuit (T12) connected to the detection circuit is operative for outputting a signal depending on an output signal from the differential amplifier pair. The signal outputted from the first output circuit is set to a given level when the detection circuit detects that the first and second input signals are outside the conmmon-mode input voltage range. A second output circuit (T11) connected to the detection circuit is operative for outputting a detection signal representing whether or not the detection circuit detects that the first and second input signals are outside the common-mode input voltage range.

摘要翻译： 差分型数据发送器包括具有多个晶体管并且接收一对第一输入信号和第二输入信号的差分放大器对（T1，T2，T4，T6，T8）。 负载（T3，T5，T7）连接到差分放大器对。 连接到差分放大器对和负载之间的结点的检测电路（T9，T10，I4，I5，I6，I7）可操作用于检测第一和第二输入信号是否在共模输入电压范围之外 相对于差分放大器对。 连接到检测电路的第一输出电路（T12）用于根据来自差分放大器对的输出信号输出信号。 当检测电路检测到第一和第二输入信号在辅助模式输入电压范围之外时，从第一输出电路输出的信号被设置为给定电平。 连接到检测电路的第二输出电路（T11）用于输出表示检测电路是否检测到第一和第二输入信号在共模输入电压范围之外的检测信号。

公开(公告)号：US20050093632A1

公开(公告)日：2005-05-05

申请号：US10725358

申请日：2003-12-01

申请人： Sergey Alenin

发明人： Sergey Alenin

IPC分类号： H03F3/18

CPC分类号： H03F1/3211 ,  H03F3/45179 ,  H03F3/45475 ,  H03F2203/45112 ,  H03F2203/45188 ,  H03F2203/45244 ,  H03F2203/45272 ,  H03F2203/45356 ,  H03F2203/45646

摘要： A class-AB MOS output stage that provides higher gain and significantly lower distortion. The class-AB MOS output stage includes a PMOS output transistor and an NMOS output transistor coupled between positive and negative supply voltages such that the MOS output transistors operate in a common source mode, a first biased class-AB control circuit coupled between the output transistor gates, a first current source coupled between the gate of the PMOS output transistor and the positive supply, a second biased class-AB control circuit, and a second current source coupled between the second control circuit and the positive supply. The second class-AB control circuit is coupled between the second current source and a non-inverting input of the output stage. The gate of the NMOS output transistor is employed as the inverting input of the output stage, which further includes two differential amplifiers for controlling the first and second current sources. The class-AB MOS output stage has a fully symmetrical differential input-to-single-ended output circuit configuration, which allows corresponding sources of gain reduction and non-linearity to cancel out, thereby improving the performance of the output stage.

公开(公告)号：US5844442A

公开(公告)日：1998-12-01

申请号：US916135

申请日：1997-08-21

申请人： Geoffrey E. Brehmer

发明人： Geoffrey E. Brehmer

IPC分类号： H03F3/45

CPC分类号： H03F3/45179 ,  H03F3/45192 ,  H03F3/45654 ,  H03F2200/331 ,  H03F2203/45028 ,  H03F2203/45036 ,  H03F2203/45074 ,  H03F2203/45134 ,  H03F2203/45182 ,  H03F2203/45244 ,  H03F2203/45272 ,  H03F2203/45278 ,  H03F2203/45424 ,  H03F2203/45478

摘要： A fully differential operational amplifier with improved common mode circuitry for low supply voltage applications is disclosed. The amplifier includes inventing and non-inventing inputs and dual-ended invented and non-invented outputs. The amplifier also includes source transistors for pulling the output to obtain particular output voltage swing. Connections between the inputs and outputs include DC biasing circuitry. The amplifier includes a transistor of select size and characteristics to compensate for voltage drop due to other transistors of the amplifier. Common mode circuitry of the amplifier provides a high level of common mode reconstruction.

摘要翻译： 公开了一种具有改进的用于低电源电压应用的共模电路的全差分运算放大器。 放大器包括发明和非发明输入和双端发明和非发明的输出。 放大器还包括用于拉动输出以获得特定输出电压摆幅的源极晶体管。 输入和输出之间的连接包括直流偏置电路。 放大器包括选择尺寸和特性的晶体管，以补偿由放大器的其它晶体管引起的电压降。 放大器的共模电路提供高水平的共模重构。