Digital to analog converter with reduced ringing
    92.
    发明授权
    Digital to analog converter with reduced ringing 有权
    数模转换器减少振铃

    公开(公告)号:US06191719B1

    公开(公告)日:2001-02-20

    申请号:US09458331

    申请日:1999-12-10

    CPC classification number: H03M1/0624 H03M1/0682 H03M1/0872 H03M1/685 H03M1/747

    Abstract: Binary indications are converted to an analog representation with significant reduction in ringing at the transitions between successive binary indications and in the period during each binary indication. The binary indications are disposed in a row-and-column matrix to provide a thermometer code. Each stage of the converter includes a decoder and latch arranged so the decoder inputs settle before the latch is set by the clock pulses. The stages are implemented in complementary CMOS. Complementary transistors are biased so one transistor of the pair is driven to the rail while the other transistor of the pair floats. A dummy CMOS transistor is used to balance the number of transistors in the decoder paths.

    Abstract translation: 二进制指示被转换为模拟表示,在连续的二进制指示之间的转换和每个二进制指示期间的周期中显着地减少振铃。 二进制指示以行和列矩阵布置以提供温度计代码。 转换器的每个级包括一个解码器和锁存器,所述解码器和锁存器布置成使得解码器输入在锁存器被时钟脉冲设置之前稳定。 这些阶段在互补CMOS中实现。 互补晶体管是偏置的,因此该对的一个晶体管被驱动到轨道,而另一个晶体管则浮动。 虚拟CMOS晶体管用于平衡解码器路径中的晶体管数量。

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