Semiconductor device with barrier layer

    公开(公告)号:US10593621B2

    公开(公告)日:2020-03-17

    申请号:US16138252

    申请日:2018-09-21

    摘要: A semiconductor device includes an interconnect substrate, an interconnect trace disposed on an upper surface of the interconnect substrate, a semiconductor chip mounted on the upper surface of the interconnect substrate, an adhesive resin layer disposed between the upper surface of the interconnect substrate and a lower surface of the semiconductor chip to bond the interconnect substrate and the semiconductor chip, the adhesive resin layer including an opening at a bottom of which an upper surface of the interconnect trace is situated, a barrier layer covering a sidewall of the opening, and conductive paste disposed inside the opening, wherein an electrode terminal of the semiconductor chip situated at the lower surface thereof is disposed inside the opening, with the conductive paste filling a space between the barrier layer and the electrode terminal.

    INDUCTOR
    93.
    发明申请
    INDUCTOR 审中-公开

    公开(公告)号:US20200051728A1

    公开(公告)日:2020-02-13

    申请号:US16533009

    申请日:2019-08-06

    摘要: An inductor includes a first conductor, a second conductor, an insulation film, and a magnetic body. The first conductor spirally extends in a plane. The second conductor spirally extends in a plane. The second conductor is stacked on and joined to the first conductor. The insulation film covers a surface of the first conductor and a surface of the second conductor. The magnetic body covers a surface of the insulation film and embeds the first conductor and the second conductor. The first conductor and the second conductor are connected to form a helical coil.

    WIRING SUBSTRATE
    94.
    发明申请
    WIRING SUBSTRATE 审中-公开

    公开(公告)号:US20190394870A1

    公开(公告)日:2019-12-26

    申请号:US16448205

    申请日:2019-06-21

    摘要: A wiring substrate includes a plurality of wiring layers, a component mounting part on which an electronic component can be mounted, and a component non-mounting part on which an electronic component cannot be mounted. A portion located in the component non-mounting part of one wiring layer of the plurality of the wiring layers includes a plurality of first through-holes having an elongated shape as seen from above and aligned with predetermined intervals with longitudinal directions of the first through-holes being faced toward a direction perpendicular to a longitudinal direction of the wiring substrate.

    WIRING SUBSTRATE
    95.
    发明申请
    WIRING SUBSTRATE 审中-公开

    公开(公告)号:US20190378804A1

    公开(公告)日:2019-12-12

    申请号:US16423370

    申请日:2019-05-28

    摘要: A wiring substrate includes: a wiring member that includes a first surface and a second surface, the wiring member including a plurality of wiring layers between the first surface and the second surface; and a carrier that is bonded to the first surface via an adhesive and that includes a plurality of layers whose coefficients of thermal expansion are different from each other. A pitch of wires included in the plurality of wiring layers is narrower on the second surface side than on the first surface side. When being heated, a direction in which the wiring member tends to warp and a direction in which the carrier tends to warp are opposite.

    WIRING SUBSTRATE AND ELECTRONIC DEVICE
    96.
    发明申请

    公开(公告)号:US20190311990A1

    公开(公告)日:2019-10-10

    申请号:US16371258

    申请日:2019-04-01

    IPC分类号: H01L23/538 H01L23/31

    摘要: A wiring substrate includes a first substrate including a wiring layer and a solder resist layer that partially covers the wiring layer. The solder resist layer includes a circular opening partially exposing the wiring layer and a support partially covering the wiring layer within the opening. The wiring layer includes a first connection pad exposed in the opening and formed by a portion of the wiring layer located at an outer side of the support. The wiring substrate further includes a cylindrical connection pin and a bonding member that bonds a first end surface of the connection pin and the first connection pad located in the opening.

    Wiring board and semiconductor device

    公开(公告)号:US10438883B2

    公开(公告)日:2019-10-08

    申请号:US15819310

    申请日:2017-11-21

    发明人: Kei Imafuji

    摘要: A wiring board includes an insulator layer having a top surface, and a plurality of pads arranged in a pad arrangement region on the top surface of the insulator layer. The pad arrangement region includes a first region in which a first plurality of pads among the plurality of pads are arranged at a first density, and a second region in which a second plurality of pads among the plurality of pads are arranged at a second density lower than the first density. At least one dummy pad is arranged juxtaposed to at least one of the second plurality of pads in the second region of the pad arrangement region.

    INTERCONNECT SUBSTRATE HAVING COLUMNAR ELECTRODES

    公开(公告)号:US20190304942A1

    公开(公告)日:2019-10-03

    申请号:US16364740

    申请日:2019-03-26

    摘要: An interconnect substrate includes a substrate, and a first connection terminal and a second connection terminal that are disposed on a surface of the substrate, wherein the first connection terminal includes a first columnar electrode and a first bump disposed on the first columnar electrode, the first columnar electrode having a flat or convex surface and having a first diameter, wherein the second connection terminal includes a second columnar electrode and a second bump disposed on the second columnar electrode, the second columnar electrode having a concave surface and having a second diameter larger than the first diameter, and wherein a melting point of the first bump and the second bump is lower than a melting point of the first columnar electrode and the second columnar electrode.

    HEAT PIPE
    99.
    发明申请
    HEAT PIPE 审中-公开

    公开(公告)号:US20190277574A1

    公开(公告)日:2019-09-12

    申请号:US16426173

    申请日:2019-05-30

    摘要: A heat pipe includes a first metal layer forming a liquid layer configured to move a working fluid that is liquefied from vapor, and a second metal layer forming a vapor layer configured to move the vapor of the working fluid that is vaporized. The first metal layer includes first cavities that cave in from a first surface of the first metal layer and are arranged apart from each other, second cavities that cave in from a second surface of the first metal layer opposite to the first surface of the first metal layer, first pores partially communicating with the first cavities and the second cavities, respectively, and second pores partially communicating side surfaces of the second cavities that are adjacent to each other. The second metal layer is provided on the first surface of the first metal layer and includes an opening exposing the plurality of first cavities.

    FLAT LOOP HEAT PIPE
    100.
    发明申请
    FLAT LOOP HEAT PIPE 审中-公开

    公开(公告)号:US20190264989A1

    公开(公告)日:2019-08-29

    申请号:US16277855

    申请日:2019-02-15

    IPC分类号: F28D15/04

    摘要: A flat loop heat pipe includes an evaporator that vaporizes a working fluid, a condenser that liquefies the working fluid vaporized by the evaporator, a vapor pipe that connects the evaporator to the condenser, and a liquid pipe that connects the condenser to the evaporator. The liquid pipe includes a first wick. The condenser includes a flow passage and a second wick. The flow passage connects the vapor pipe and the liquid pipe. The second wick is connected to the first wick. The second wick is exposed in the flow passage and extends from the flow passage in a planar direction.