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    Pixel circuit having a plurality of enable signals and gate signals in opposite phase and driving method thereof
    91.
    发明授权
    Pixel circuit having a plurality of enable signals and gate signals in opposite phase and driving method thereof 有权

    公开(公告)号：US11495178B2

    公开(公告)日：2022-11-08

    申请号：US17243915

    申请日：2021-04-29

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Zhichong Wang ,  Fuqiang Li ,  Peng Liu ,  Xinglong Luan ,  Jing Feng

    IPC: G09G3/3258 ,  G09G3/3291 ,  H01L27/32

    Abstract: A pixel circuit includes a data writing sub-circuit, a light-emitting control sub-circuit and a driving sub-circuit. The data writing sub-circuit is connected to the driving sub-circuit, and is configured to write a data voltage signal into the driving sub-circuit and compensate it, in response to a first gate signal and a second gate signal. The light-emitting control sub-circuit is connected to the driving sub-circuit, and is configured to close a line between a first power supply voltage terminal and a second power supply voltage terminal, in response to a first enable signal and a second enable signal. The driving sub-circuit is configured to provide a driving current to a light-emitting device through the closed line according to the written data voltage signal. Phases of the first enable signal and the first gate signal are opposite, and phases of the second enable signal and the second gate signal are opposite.

    THIN FILM TRANSISTOR, ARRAY SUBSTRATE, FABRICATING METHODS THEREOF, AND DISPLAY APPARATUS
    95.
    发明申请
    THIN FILM TRANSISTOR, ARRAY SUBSTRATE, FABRICATING METHODS THEREOF, AND DISPLAY APPARATUS 有权

    公开(公告)号：US20210351207A1

    公开(公告)日：2021-11-11

    申请号：US16316112

    申请日：2018-05-14

    Applicant: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Lei Li ,  Jun Fan ,  Fuqiang Li ,  Taiyang Liu

    IPC: H01L27/12 ,  H01L29/786

    Abstract: The present disclosure is related to a thin film transistor. The thin film transistor may include a gate pattern; an active layer pattern; a gate insulating layer between the gate pattern and the active layer pattern; a first conductive pattern including a first pattern part and a first connecting part; a second conductive pattern a second pattern part and a second connecting part; and a first intermediate insulating layer between the first pattern part and the second pattern part. The first conductive pattern and the second conductive pattern may be a source pattern and a drain pattern, respectively. A first through hole may be provided on the first intermediate insulating layer. The second conductive pattern may be connected to the active layer pattern through the second connecting part in the first through hole.

    Pixel circuit having latch sub-circuit and latch-control sub-circuits, display panel, driving method thereof, and a display apparatus
    98.
    发明授权
    Pixel circuit having latch sub-circuit and latch-control sub-circuits, display panel, driving method thereof, and a display apparatus 有权

    公开(公告)号：US11074883B2

    公开(公告)日：2021-07-27

    申请号：US16616956

    申请日：2017-12-13

    Applicant: Ordos Yuansheng Optoelectronics Co., Ltd. ,  BOE Technology Group Co., Ltd.

    Inventor： Fuqiang Li ,  Jun Fan

    IPC: G09G3/36

    Abstract: The present application discloses a pixel circuit of a display panel. The pixel circuit includes a first latch-control sub-circuit configured to provide a data signal under controls of a first scan signal, a latch sub-circuit including a first inverter having an input terminal coupled to receive the data signal and a second inverter, a second latch-control sub-circuit configured to disconnect the second inverter from the first inverter to form an open circuit under controls of the first scan signal or form a latch loop under controls of a second scan signal to stabilize two voltage levels at the first output terminal of the first inverter and the second output terminal of the second output inverter, and an output sub-circuit configured to switch connection between an output terminal and two reference voltage ports under controls of the two voltage levels alternatively.

    Shift register unit circuit, driving method thereof, gate drive circuit and display device
    100.
    发明授权
    Shift register unit circuit, driving method thereof, gate drive circuit and display device 有权

    公开(公告)号：US10706767B2

    公开(公告)日：2020-07-07

    申请号：US15756975

    申请日：2017-08-31

    Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.

    Inventor： Jun Fan ,  Wei Li ,  Fuqiang Li

    IPC: G09G3/20 ,  G11C19/28 ,  G11C19/18

    Abstract: A shift register unit circuit includes an input circuit configured to supply an active potential to a first node responsive to an input pulse from an input terminal being active and to supply an inactive potential to the first node responsive to a reset pulse from a reset terminal being active; an output circuit configured to supply a first clock signal to an output terminal responsive to a second node being at the active potential and to cause a potential at the second node to be changed from the active potential to further away from the inactive potential responsive to a transition of a potential at the output terminal transitioning from the inactive potential to the active potential; and a potential control circuit configured to restrict a change in the potential at the first node caused by the transition of the potential at the output terminal from the inactive potential to the active potential.

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