PERFORMING A PERFORM TIMING FACILITY FUNCTION INSTRUCTION FOR SYNCHRONIZING TOD CLOCKS
    93.
    发明申请
    PERFORMING A PERFORM TIMING FACILITY FUNCTION INSTRUCTION FOR SYNCHRONIZING TOD CLOCKS 有权
    执行同步时钟功能的功能指令同步时钟

    公开(公告)号:US20120173917A1

    公开(公告)日:2012-07-05

    申请号:US13402554

    申请日:2012-02-22

    IPC分类号: G06F1/04 G04C11/00

    CPC分类号: G06F1/14

    摘要: A system, method and computer program product for steering a time-of-day (TOD) clock for a computer system having a physical clock providing a time base for executing operations that is stepped to a common oscillator. The method includes receiving, at a processing unit, a request to change a clock steering rate used to control a TOD-clock offset value for the processing unit, the TOD-clock offset defined as a function of a start time (s), a base offset (b), and a steering rate (r). The unit schedules a next episode start time with which to update the TOD-clock offset value. After updating TOD-clock offset value (d) at the scheduled time, TOD-clock offset value is added to a physical-clock value (Tr) value to obtain a logical TOD-clock value (Tb), where the logical TOD-clock value is adjustable without adjusting a stepping rate of the oscillator.

    摘要翻译: 一种用于转向具有物理时钟的计算机系统的时钟(TOD)时钟的系统,方法和计算机程序产品,该物理时钟提供用于执行步进到公共振荡器的操作的时基。 该方法包括在处理单元处接收用于改变用于控制处理单元的TOD时钟偏移值的时钟转向速率的请求,定义为开始时间的函数的TOD时钟偏移量, 基本偏移(b)和转向率(r)。 该单元安排下一个开始时间来更新TOD时钟偏移值。 在预定时间更新TOD时钟偏移值(d)后,将TOD时钟偏移值加到物理时钟值(Tr)值,以获得逻辑TOD时钟值(Tb),其中逻辑TOD时钟 值可调节,而不需要调整振荡器的步进速率。

    Millicode assist instructions for millicode store access exception checking
    94.
    发明授权
    Millicode assist instructions for millicode store access exception checking 有权
    Millicode帮助指令用于millicode存储访问异常检查

    公开(公告)号:US08176301B2

    公开(公告)日:2012-05-08

    申请号:US12031756

    申请日:2008-02-15

    摘要: Millicode store access checking instructions are provided via an operand access control register (OACR) including a test modifier indicator, which is communicatively coupled to an instruction unit subsystem, the instruction unit subsystem for fetching and decoding instructions. The instructions include a millicode instruction with an operand defining an address to check for a store access exception. In addition, an execution unit for executing the millicode instruction performs a method. The method includes receiving the millicode instruction from the instruction unit subsystem, testing for the store access exception at the address as if the test modifier is set absent an update to the OACR, and outputting a result of the testing for the store access exception.

    摘要翻译: 经由操作数访问控制寄存器(OACR)提供Millicode存储访问检查指令,该操作数访问控制寄存器(OACR)包括通信地耦合到指令单元子系统的指令单元子系统,用于获取和解码指令。 该指令包括一个具有操作数的millicode指令,其中定义了一个地址来检查存储访问异常。 另外,用于执行millicode指令的执行单元执行一种方法。 该方法包括从指令单元子系统接收millicode指令,测试地址处的存储访问异常,就好像将测试修饰符设置为不存在对OACR的更新,并输出用于存储访问异常的测试结果。

    Method, system and computer program product involving error thresholds
    97.
    发明授权
    Method, system and computer program product involving error thresholds 有权
    涉及误差阈值的方法,系统和计算机程序产品

    公开(公告)号:US07984341B2

    公开(公告)日:2011-07-19

    申请号:US12036697

    申请日:2008-02-25

    IPC分类号: G06F11/00

    CPC分类号: G06F11/0721 G06F11/076

    摘要: A system for processing errors in a processor comprising, an error counter, a pass counter, and a processing portion operative to determine whether a first error is active, increment an error counter responsive to determining that the first error is active, increment the pass counter responsive to determining that all errors have been checked, and clear the error counter responsive to determining that the pass counter is greater than or equal to a pass count threshold value.

    摘要翻译: 一种用于处理处理器中的错误的系统,包括:错误计数器,通过计数器和可操作以确定第一错误是否有效的处理部分,响应于确定第一错误是活动的,增加错误计数器,增加通过计数器 响应于确定已经检查了所有错误,并且响应于确定通过计数器大于或等于通过计数阈值来清除错误计数器。

    METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR PROCESSING ERROR INFORMATION IN A SYSTEM
    99.
    发明申请
    METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR PROCESSING ERROR INFORMATION IN A SYSTEM 有权
    用于处理系统中的错误信息的方法,系统和计算机程序产品

    公开(公告)号:US20090217108A1

    公开(公告)日:2009-08-27

    申请号:US12036745

    申请日:2008-02-25

    IPC分类号: G06F11/00

    CPC分类号: G06F11/0769 G06F11/0721

    摘要: A system for processing errors in a processor comprising, a first register having a unique identifier operative to store a first error data, a processor operative to retrieve the first error data from the first register, associate the first error data with the unique identifier, and generate a first uniform error packet including the first error data and the unique identifier and a storage medium operative to store the first uniform error packet.

    摘要翻译: 一种用于处理处理器中的错误的系统,包括:第一寄存器,具有用于存储第一错误数据的唯一标识符;可操作以从第一寄存器检索第一错误数据的处理器将第一错误数据与唯一标识符相关联;以及 产生包括第一错误数据和唯一标识符的第一均匀错误包,以及可操作地存储第一均匀错误包的存储介质。

    Method and apparatus for adjusting a time of day clock without adjusting the stepping rate of an oscillator
    100.
    发明授权
    Method and apparatus for adjusting a time of day clock without adjusting the stepping rate of an oscillator 有权
    用于调整时钟的时钟而不调整振荡器的步进速率的方法和装置

    公开(公告)号:US07356725B2

    公开(公告)日:2008-04-08

    申请号:US11223886

    申请日:2005-09-09

    IPC分类号: G06F1/04 G04C11/00

    CPC分类号: G06F1/14

    摘要: A system, method and computer program product for steering a time-of-day (TOD) clock for a computer system having a physical clock providing a time base for executing operations that is stepped to a common oscillator. The method includes computing a TOD-clock offset value (d) to be added to a physical-clock value (Tr) value to obtain a logical TOD-clock value (Tb), where the logical TOD-clock value is adjustable without adjusting a stepping rate of the oscillator.

    摘要翻译: 一种用于转向具有物理时钟的计算机系统的时钟(TOD)时钟的系统,方法和计算机程序产品,该物理时钟提供用于执行步进到公共振荡器的操作的时基。 该方法包括计算要添加到物理时钟值(Tr)值的TOD时钟偏移值(d)以获得逻辑TOD时钟值(Tb),其中逻辑TOD时钟值可调整而不调整 振荡器的步进率。