公开(公告)号：US10424382B2

公开(公告)日：2019-09-24

申请号：US16219144

申请日：2018-12-13

Applicant: Micron Technology, Inc.

Inventor： Sebastien Andre Jean

IPC: G11C16/22 ,  G11C16/04 ,  G11C7/04 ,  G11C16/26 ,  G11C16/10

Abstract: Devices and techniques for increased NAND performance under high thermal conditions are disclosed herein. An indicator of a high-temperature thermal condition for a NAND device may be obtained. A workload of the NAND device may be measured in response to the high-temperature thermal condition. Operation of the NAND device may then be modified based on the workload and the high-temperature thermal condition.

公开(公告)号：US10409726B2

公开(公告)日：2019-09-10

申请号：US15797812

申请日：2017-10-30

Applicant: Micron Technology, Inc.

Inventor： Sebastien Andre Jean

IPC: G06F12/08 ,  G06F12/0871 ,  G06F9/54 ,  G06F9/50 ,  G06F12/02

Abstract: Disclosed in some examples are methods, systems, and machine readable mediums that dynamically adjust the size of an L2P cache in a memory device in response to observed operational conditions. The L2P cache may borrow memory space from a donor memory location, such as a read or write buffer. For example, if the system notices a high amount of read requests, the system may increase the size of the L2P cache at the expense of the write buffer (which may be decreased). Likewise, if the system notices a high amount of write requests, the system may increase the size of the L2P cache at the expense of the read buffer (which may be decreased).

公开(公告)号：US20190259463A1

公开(公告)日：2019-08-22

申请号：US16405192

申请日：2019-05-07

Applicant: Micron Technology, Inc.

Inventor： Sebastien Andre Jean ,  Harish Reddy Singidi

IPC: G11C16/34 ,  G11C16/04 ,  G11C16/10 ,  G06F13/16 ,  G11C16/30 ,  G11C16/26

Abstract: Devices and techniques for voltage degradation aware NAND array management are disclosed herein. Voltage to a NAND device is monitored to detect a voltage event. A history of voltage events is modified with the voltage event. A voltage condition is observed from the history of voltage events. An operational parameter of a NAND array in the NAND device is then modified in response to the voltage condition.

公开(公告)号：US10181351B1

公开(公告)日：2019-01-15

申请号：US15690708

申请日：2017-08-30

Applicant: Micron Technology, Inc.

Inventor： Sebastien Andre Jean

IPC: G11C16/22 ,  G11C16/04 ,  G11C16/26

Abstract: Devices and techniques for increased NAND performance under high thermal conditions are disclosed herein. An indicator of a high-temperature thermal condition for a NAND device may be obtained. A workload of the NAND device may be measured in response to the high-temperature thermal condition. Operation of the NAND device may then be modified based on the workload and the high-temperature thermal condition.

公开(公告)号：US10096370B1

公开(公告)日：2018-10-09

申请号：US15691813

申请日：2017-08-31

Applicant: Micron Technology, Inc.

Inventor： Sebastien Andre Jean ,  Harish Singidi

IPC: G11C11/34 ,  G11C16/34 ,  G11C16/04 ,  G11C16/10

Abstract: Devices and techniques for voltage degradation aware NAND array management are disclosed herein. Voltage to a NAND device is monitored to detect a voltage event. A history of voltage events is modified with the voltage event. A voltage condition is observed from the history of voltage events. An operational parameter of a NAND array in the NAND device is then modified in response to the voltage condition.