Transistor having an asymmetric source/drain and halo implantation region and a method of forming the same
    91.
    发明授权
    Transistor having an asymmetric source/drain and halo implantation region and a method of forming the same 有权
    具有不对称源极/漏极和晕圈注入区的晶体管及其形成方法

    公开(公告)号:US07208397B2

    公开(公告)日:2007-04-24

    申请号:US11122740

    申请日:2005-05-05

    IPC分类号: H01L21/425 H01L21/22

    摘要: By providing an asymmetric design of a halo region and extension regions of a field effect transistor, the transistor performance may significantly be enhanced for a given basic transistor architecture. In particular, a large overlap area may be created at the source side with a steep concentration gradient of the PN junction due to the provision of the halo region, whereas the drain overlap may be significantly reduced or may even completely be avoided, wherein a moderately reduced concentration gradient may further enhance the transistor performance.

    摘要翻译: 通过提供场效应晶体管的光晕区域和延伸区域的非对称设计,对于给定的基本晶体管架构,晶体管性能可以显着增强。 特别地,由于提供了卤素区域,可能在源极侧产生具有PN结的陡峭浓度梯度的大的重叠区域,而可以显着地减少或甚至可以完全避免漏极重叠,其中适度地 降低的浓度梯度可进一步提高晶体管的性能。

    Technique for forming a spacer for a line element by using an etch stop layer deposited by a highly directional deposition technique
    92.
    发明授权
    Technique for forming a spacer for a line element by using an etch stop layer deposited by a highly directional deposition technique 有权
    通过使用通过高度定向沉积技术沉积的蚀刻停止层来形成用于线元件的间隔物的技术

    公开(公告)号:US07109086B2

    公开(公告)日:2006-09-19

    申请号:US10987827

    申请日:2004-11-12

    IPC分类号: H01L21/336

    摘要: The present invention provides a technique that enables the formation of a recessed spacer element by using an anisotropically deposited etch stop layer. Accordingly, in subsequent cleaning processes, material residues of the etch stop layer may be efficiently removed from upper sidewall portions of a line element, thereby increasing the available area for a diffusion path in a subsequent silicidation process. The anisotropic deposition of the etch stop layer may be accomplished by high density plasma enhanced CVD or by directional sputter techniques.

    摘要翻译: 本发明提供一种能够通过使用各向异性沉积的蚀刻停止层形成凹陷间隔元件的技术。 因此,在随后的清洗过程中,可以有效地从线元件的上侧壁部分去除蚀刻停止层的材料残留物,从而增加随后的硅化工艺中扩散路径的可用面积。 蚀刻停止层的各向异性沉积可以通过高密度等离子体增强CVD或定向溅射技术来实现。

    Method of forming sidewall spacers
    93.
    发明申请
    Method of forming sidewall spacers 有权
    形成侧墙的方法

    公开(公告)号:US20060115988A1

    公开(公告)日:2006-06-01

    申请号:US11177216

    申请日:2005-07-08

    IPC分类号: H01L21/461

    CPC分类号: H01L21/823468

    摘要: A substrate comprising a first transistor element and a second transistor element is provided. A layer of a material is deposited over the first transistor element and the second transistor element. A portion of the layer of material is modified, which may be done, e.g., by irradiating the portion with ions or performing an isotropic etching process to reduce its thickness. An etching process adapted to remove the modified portion of the layer of material more quickly than an unmodified portion of the layer located over the second transistor element is performed.

    摘要翻译: 提供了包括第一晶体管元件和第二晶体管元件的衬底。 一层材料沉积在第一晶体管元件和第二晶体管元件上。 材料层的一部分被修饰,其可以例如通过用离子照射部分或执行各向同性蚀刻工艺来实现,以减小其厚度。 执行适于比位于第二晶体管元件上方的层的未修改部分更快地去除材料层的修饰部分的蚀刻工艺。