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公开(公告)号:US20240389420A1
公开(公告)日:2024-11-21
申请号:US18694438
申请日:2023-08-02
Inventor: Benlian WANG , Jianghua LIU , Ming HU , Haijun QIU
IPC: H10K59/35 , H10K59/12 , H10K59/131
Abstract: A display substrate, comprising: a base, multiple first region light-emitting elements, multiple second region light-emitting elements, multiple first pixel circuits, and multiple second pixel circuits. The base comprises a first display area and, located on at least one side of the first display area, a second display area. The multiple first region light-emitting elements are located in the first display area and comprise multiple first light-emitting elements emitting first-color light. The multiple second region light-emitting elements, the multiple first pixel circuits, and the multiple second pixel circuits are located in the second display area. At least one first pixel circuit is electrically connected to n first light-emitting elements, and is configured to drive the n first light-emitting elements to emit light. And at least one first pixel circuit is electrically connected to m first light-emitting elements, and is configured to drive the m first light-emitting elements to emit light.
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公开(公告)号:US20240389415A1
公开(公告)日:2024-11-21
申请号:US17914584
申请日:2021-09-24
Inventor: Rui WANG , Chao ZENG , Yuanyou QIU , Ming HU , Weishu WEN
IPC: H10K59/131
Abstract: An array substrate has a display area and a peripheral area. The array substrate includes a substrate, a first common voltage line disposed on a first side of the substrate, and a voltage signal introduction structure disposed on the first side of the substrate. The first common voltage line is located in the peripheral area and arranged along at least part of a boundary of the display area. The voltage signal introduction structure is electrically connected to at least one position except two ends of the first common voltage line, so as to input a voltage signal to the first common voltage line.
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公开(公告)号:US20240365611A1
公开(公告)日:2024-10-31
申请号:US18029381
申请日:2022-04-19
Inventor: Mengqi WANG , Ziyang YU , Zhiliang JIANG , Ming HU
IPC: H10K59/131
CPC classification number: H10K59/131
Abstract: A display substrate, a preparing method therefor, and a display apparatus are disclosed. The display substrate includes multiple data signal lines (60) and multiple data fanout lines (70) disposed along a first direction (X). A data signal line (60) extends in a second direction (Y). A first terminal of the data fanout line (70) is connected to a lead line (90). A second terminal of the data fanout line (70) is connected to the data signal line (60). At least one data fanout line (70) includes multiple fanout step sub-lines connected sequentially, the at least one fanout step sub-line at least includes a first fanout line (71) and a second fanout line (72) connected to each other. The first fanout line (71) has a line shape extending along a first direction (X) and the second fanout line (72) has a line shape extending along a second direction (Y).
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公开(公告)号:US20240353962A1
公开(公告)日:2024-10-24
申请号:US18038987
申请日:2022-04-28
Inventor: Kemeng TONG , Ming HU , Cong FAN , Fan HE , Xiangdan DONG
IPC: G06F3/044 , G06F3/041 , H10K59/131 , H10K59/40
CPC classification number: G06F3/0445 , G06F3/0412 , G06F3/04164 , G06F3/0446 , H10K59/131 , H10K59/40 , G06F2203/04111
Abstract: A display panel includes a base substrate, a driving layer, a pixel layer and a touch layer stacked sequentially. In a peripheral area of the display panel, the driving layer is provided with a touch pin and a touch relay wire connected with the touch pin; the touch layer includes a touch organic layer and a touch metal layer buried in the touch organic layer, and the touch metal layer is formed with a touch channel and a touch wiring connected with the touch channel. The touch organic layer exposes the touch pin, and an end of the touch relay wire away from the touch pin extends between the touch organic layer and the base substrate. The touch wiring does not protrude out of the touch organic layer, and the touch wiring is electrically connected to the end of the touch relay wire away from the touch pin through a via hole.
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公开(公告)号:US20240331628A1
公开(公告)日:2024-10-03
申请号:US18251069
申请日:2022-05-31
Inventor: Ziyang YU , Haijun QIU , Ming HU , Zhiliang JIANG , Haigang QING , Yunsheng XIAO , Tiaomei ZHANG , Miao WANG
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2310/061 , G09G2310/08 , G09G2320/0247
Abstract: A pixel circuit includes a data writing sub-circuit, a driving sub-circuit, and one or more potential maintenance sub-circuits. The data writing sub-circuit is coupled to at least a first voltage signal terminal, a data signal terminal, a first scan signal terminal and a first node, and writes a data signal provided by the data signal terminal into the first node under control of at least a first scan signal provided by the first scan signal terminal. The driving sub-circuit is coupled to the first node, a second node and a third node, and creates a path between the second node and the third node under control of a potential at the first node. A potential maintenance sub-circuit is coupled to a circuit node and a reference signal terminal, and maintains a potential at the circuit node through a reference signal provided by the reference signal terminal.
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公开(公告)号:US20240304148A1
公开(公告)日:2024-09-12
申请号:US18669642
申请日:2024-05-21
Inventor: Rui WANG , Ming HU , Haijun QIU , Weiyun HUANG , Yao HUANG , Chao ZENG , Yuanyou QIU , Shaoru LI , Tianyi CHENG
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2310/08 , G09G2320/0233 , G09G2320/0247
Abstract: A pixel circuit and a driving method thereof, and a display device are provided. The pixel circuit includes a driving sub-circuit, a data writing sub-circuit, a first light-emitting control sub-circuit, a second light-emitting control sub-circuit, a compensation sub-circuit, and a first reset sub-circuit, and is configured to generate a driving current to control a light-emitting element to emit light, the first reset sub-circuit comprises a first transistor, the compensation sub-circuit comprises a second transistor, the first transistor and the second transistor are both polysilicon oxide thin film transistors, and an active layer type of the first transistor and an active layer type of the second transistor are different from an active layer type of a transistor comprised in at least one selected from a group consisting of the driving sub-circuit, the data writing sub-circuit, the first light-emitting control sub-circuit, and the second light-emitting control sub-circuit.
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公开(公告)号:US20240304142A1
公开(公告)日:2024-09-12
申请号:US18028522
申请日:2022-04-18
Inventor: Ziyang YU , Zhiliang JIANG , Ming HU
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2310/08 , G09G2320/0233
Abstract: Disclosed is a pixel circuit including a drive sub-circuit, a writing sub-circuit, a reset sub-circuit, a coupling sub-circuit, a storage sub-circuit, and a light emitting element, wherein the drive sub-circuit is configured to provide a drive current to the light emitting element under control of signals of a first node and a second node; the writing sub-circuit is configured to write a signal of a data signal terminal to the second node under control of a signal of a scan signal terminal; the coupling sub-circuit is configured to raise the voltage of the first node through a coupling action; the reset sub-circuit is configured to reset an anode terminal of the light emitting element under control of a signal of the scan signal terminal and reset a control terminal of the drive sub-circuit under control of a signal of a reset control signal terminal.
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公开(公告)号:US20240282238A1
公开(公告)日:2024-08-22
申请号:US18650484
申请日:2024-04-30
Inventor: Haigang QING , Ming HU , Haijun QIU
CPC classification number: G09G3/2092 , G09G2310/0286 , G11C19/287
Abstract: The present disclosure relates to the field of display, and discloses a shifting register, a driving method, a gate driving circuit and a display device. The shifting register includes: an input sub-circuit, coupled to a signal input terminal, a first clock signal terminal and a first node; a control sub-circuit, coupled to the first clock signal terminal, a second clock signal terminal, the signal input terminal, a first power terminal, a second power terminal and a second node, where the first power terminal or the second power terminal determines a potential of the second node under the control of the first clock signal terminal, the second clock signal terminal and the signal input terminal; and an output sub-circuit, coupled to the first power terminal, the second power terminal, the first node, the second node and a signal output terminal.
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公开(公告)号:US20240244939A1
公开(公告)日:2024-07-18
申请号:US18563460
申请日:2022-02-28
Inventor: Quan SHI , Bo SHI , Guanghua XU , Zeyu LI , Chi YU , Haijun QIU , Ming HU , Weiyun HUANG , Xiangdan DONG , Hui GUAN
IPC: H10K59/80 , H10K59/12 , H10K59/122 , H10K59/40
CPC classification number: H10K59/879 , H10K59/1201 , H10K59/122 , H10K59/40
Abstract: A display panel includes a driving backplane, a plurality of light-emitting devices spaced apart at a side of the driving backplane a pixel definition layer located at a same side of the driving backplane as the light-emitting device and provided with a plurality of openings and a lens layer located at a side of the light-emitting device away from the driving backplane. The lens layer includes a separating lens and an intermediate lens, the separating lens is provided with a light-transmitting hole, and the intermediate lens is located within a range surrounded by the light-transmitting hole and is spaced apart from a sidewall of the light-transmitting hole. The display panel further includes a dielectric layer covering the lens layer and filling the light-transmitting hole, and a cover plate located at a side of the dielectric layer away from the driving backplane.
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公开(公告)号:US20240032376A1
公开(公告)日:2024-01-25
申请号:US18478920
申请日:2023-09-29
Inventor: Ming HU , Yan HUANG , Chang LUO , Jianpeng WU , Benlian WANG , Peng XU , Wei ZHANG , Qian XU
IPC: H10K59/35
CPC classification number: H10K59/353 , H10K59/351 , H10K59/352
Abstract: A pixel array includes a plurality of sub-pixels, which include first to third sub-pixels. The first and third sub-pixels are alternately arranged along a row direction and form first pixel rows. The first and third sub-pixels, which are in a same column, in the first pixel rows are alternately arranged, and the second sub-pixels are arranged side by side along the row direction and form second pixel rows. Lines sequentially connecting centers of two of the first sub-pixels and two of the third sub-pixels, which are arranged in an array, together form a first virtual quadrilateral, and one of the second sub-pixels is in each first virtual quadrilateral. A straight line in the row direction or in a column direction, which passes through a center of each sub-pixel of at least one of the plurality of sub-pixels, divides the sub-pixel into two parts having areas different from each other.
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