摘要:
A memory subsystem is provided including an interface circuit adapted for coupling with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for emulating at least one memory circuit with at least one aspect that is different from at least one aspect of at least one of the plurality of memory circuits. Such aspect includes a signal, a capacity, a timing, and/or a logical interface.
摘要:
A power saving system and method are provided. In use, at least one of a plurality of memory circuits is identified that is not currently being accesses. In response to the identification of the at least one memory circuit, a power saving operation is initiated in association with the at least one memory circuit.
摘要:
A memory circuit power management system and method are provided. An interface circuit is in communication with a plurality of memory circuits and a system. In use, the interface circuit is operable to perform a power management operation in association with only a portion of the memory circuits
摘要:
Systems, methods, and apparatus, including computer program products, for providing termination resistance in a memory module are provided. An apparatus is provided that includes a plurality of memory circuits; an interface circuit operable to communicate with the plurality of memory circuits and to communicate with a memory controller; and a transmission line electrically coupling the interface circuit to a memory controller, wherein the interface circuit is operable to terminate the transmission line with a single termination resistance that is selected based on a plurality of resistance-setting commands received from the memory controller.
摘要:
Systems, methods, and apparatus, including computer program products, for providing termination resistance in a memory module are provided. An apparatus is provided that includes a plurality of memory circuits; an interface circuit operable to communicate with the plurality of memory circuits and to communicate with a memory controller; and a transmission line electrically coupling the interface circuit to a memory controller, wherein the interface circuit is operable to terminate the transmission line with a single termination resistance that is selected based on a plurality of resistance-setting commands received from the memory controller.
摘要:
Systems, methods, and apparatus, including computer program products, for providing termination resistance in a memory module are provided. An apparatus is provided that includes a plurality of memory circuits; an interface circuit operable to communicate with the plurality of memory circuits and to communicate with a memory controller; and a transmission line electrically coupling the interface circuit to a memory controller, wherein the interface circuit is operable to terminate the transmission line with a single termination resistance that is selected based on a plurality of resistance-setting commands received from the memory controller.
摘要:
A method and pump that accurately senses air in a fluid delivery line pulses or activates and deactivates the air sensor(s) multiple times during the pumping phase of the fluid delivery cycle and can generate alarms based upon a single indication or a cumulative indication of air in the line. The pump can include multiple air sensors spaced along the delivery line so that the method can use the multiple signals therefrom to distinguish real moving air bubbles from false positives and/or air bubbles adhered to the inner wall of the line.
摘要:
Mechanical digital lock operable through a series of mechanical operations actuated by the depression of digital keys comprises an intellectual combination of essential mechanisms including a plurality of keys, digital selectors, identifiers, locking means and automatic resets. The lock cannot be opened unless the predetermined digitals are sequentially depressed. Once the lock is opened, it is automatically reset. A change of combination of digitals can easily be manually effected without any tool. With its novel structure, it is highly reliable.
摘要:
A method for operating a memory module device. The method can include transferring a chip select, command, and address information from a host memory controller. The host memory controller can be coupled to a memory interface device, which can be coupled to a memory module. The memory module can comprise a plurality of memory devices. The chip select, command and address information can be received at the memory interface using a command-and-address-latency (CAL) mode. Control logic can be used to initiate a power state transition from a first power state to a second power state of an input termination circuit in the memory interface device.
摘要:
A method for operating a memory module device. The method can include transferring a chip select, command, and address information from a host memory controller. The host memory controller can be coupled to a memory interface device, which can be coupled to a memory module. The memory module can comprise a plurality of memory devices. The chip select, command and address information can be received at the memory interface using a command-and-address-latency (CAL) mode. Control logic can be used to initiate a power state transition from a first power state to a second power state of an input termination circuit in the memory interface device.