公开(公告)号：US20220239913A1

公开(公告)日：2022-07-28

申请号：US17724178

申请日：2022-04-19

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Ru Ling LIAO ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Jing Ya LI

IPC: H04N19/119 ,  H04N19/137 ,  H04N19/176 ,  H04N19/52

Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.

公开(公告)号：US20220182612A1

公开(公告)日：2022-06-09

申请号：US17681051

申请日：2022-02-25

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya LI ,  Chong Soon LIM ,  Han Boon TEO ,  Che Wei KUO ,  Hai Wei SUN ,  Chu Tong WANG ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Yusuke KATO

IPC: H04N19/105 ,  H04N19/14 ,  H04N19/159 ,  H04N19/176

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation: determines whether a size of a current block, which is a unit for which a vector candidate list including vector candidates is generated, is less than or equal to a threshold; when the size of the current block is less than or equal to the threshold, generates the vector candidate list by registering a history-based motion vector predictor (HMVP) vector candidate in the vector candidate list from an HMVP table without performing a first pruning process; when the size of the current block is greater than the threshold, generates the vector candidate list by performing the first pruning process and registering the HMVP vector candidate in the vector candidate list from the HMVP table; and encodes the current block using the vector candidate list.

公开(公告)号：US20220174300A1

公开(公告)日：2022-06-02

申请号：US17675444

申请日：2022-02-18

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya LI ,  Chong Soon LIM ,  Han Boon TEO ,  Che-Wei KUO ,  Hai Wei SUN ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Yusuke KATO

IPC: H04N19/423 ,  H04N19/174 ,  H04N19/172

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry encodes second information indicating whether first information is present in a bitstream, the first information being regarding a subpicture which is a rectangular region in a picture, the picture including slices, and when the second information indicates that the first information is present in the bitstream, each of the slices is a rectangular slice and has a subpicture index indicating a subpicture to which the slice belongs.

公开(公告)号：US20220159308A1

公开(公告)日：2022-05-19

申请号：US17589419

申请日：2022-01-31

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya LI ,  Chong Soon LIM ,  Han Boon TEO ,  Hai Wei SUN ,  Che-Wei KUO ,  Chu Tong WANG ,  Tadamasa TOMA ,  Takahiro NISHI ,  Kiyofumi ABE ,  Yusuke KATO

IPC: H04N19/82 ,  H04N19/132 ,  H04N19/186 ,  H04N19/117 ,  H04N19/176 ,  H04N19/119 ,  H04N19/11 ,  H04N19/105 ,  H04N19/109 ,  H04N19/61 ,  H04N19/18 ,  H04N19/124 ,  H04N19/13 ,  H04N19/12 ,  H04N19/157 ,  H04N19/172

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation, generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component, and generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry modifies the first coefficient value by performing an arithmetic right shift by 7 bits on the first coefficient value. The circuitry generates a third coefficient value by adding the modified first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value.

公开(公告)号：US20220159307A1

公开(公告)日：2022-05-19

申请号：US17589393

申请日：2022-01-31

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chu Tong WANG ,  Chong Soon LIM ,  Han Boon TEO ,  Hai Wei SUN ,  Jing Ya LI ,  Che-Wei KUO ,  Tadamasa TOMA ,  Takahiro NISHI ,  Kiyofumi ABE ,  Yusuke KATO

IPC: H04N19/82 ,  H04N19/132 ,  H04N19/167 ,  H04N19/117 ,  H04N19/186 ,  H04N19/17

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in response to a first reconstructed image sample being located outside a virtual boundary, duplicates a reconstructed sample located inside and adjacent to the virtual boundary to generate the first reconstructed image sample. The circuitry generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to the first reconstructed image sample of a luma component. The circuitry generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry generates a third coefficient value by adding the first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value.

公开(公告)号：US20220086476A1

公开(公告)日：2022-03-17

申请号：US17534898

申请日：2021-11-24

Applicant: Panasonic Intellectual Property Corporation Of America

Inventor： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Ru Ling LIAO ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Jing Ya LI

IPC: H04N19/513 ,  H04N19/132 ,  H04N19/176 ,  H04N19/563

Abstract: The present disclosure provides systems and methods for video coding. The systems include, for example, an image encoder comprising: circuitry; and a memory coupled to the circuitry, wherein the circuitry, in operation, performs the following: predicting a first block of prediction samples for a current block of a picture, wherein predicting the first block of prediction samples includes at least a prediction process with a motion vector from a different picture; padding the first block of prediction samples to form a second block of prediction samples, wherein the second block is larger than the first block; calculating at least a gradient using the second block of prediction samples; and encoding the current block using at least the calculated gradient.

公开(公告)号：US20210409758A1

公开(公告)日：2021-12-30

申请号：US17469748

申请日：2021-09-08

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Ru Ling LIAO ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Jing Ya LI

IPC: H04N19/537 ,  H04N19/119 ,  H04N19/176

Abstract: An encoder, when sub-block encoding is to be performed, determines a plurality of sub-blocks in a first image block, the plurality of sub-blocks including a first sub-block, determines a first motion vector for the first sub-block by referring to a first candidate list, performs first inter prediction processing on the first sub-block using the first motion vector, and encodes the first image block using a result of the first inter prediction processing. When partition encoding is to be performed, the encoder, in operation, determines a plurality of partitions in a second image block, the plurality of partitions including a first partition, determines a second motion vector for the first partition by referring to a second candidate list, performs second inter prediction processing on the first partition using the second motion vector, and encodes the second image block using a result of the second inter prediction processing.

公开(公告)号：US20210360239A1

公开(公告)日：2021-11-18

申请号：US17391315

申请日：2021-08-02

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya LI ,  Chong Soon LIM ,  Han Boon TEO ,  Hai Wei SUN ,  Che Wei KUO ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Yusuke KATO

IPC: H04N19/117 ,  H04N19/82 ,  H04N19/132 ,  H04N19/105 ,  H04N19/176

Abstract: An encoder comprises: a processor; and memory coupled to the processor, in which in operation, the processor: generates a first prediction image having full-pel precision, based on a motion vector of the current block; generates a second prediction image having fraction-pel precision by interpolating a value at a fraction-pel position between full-pel positions included in the first prediction image, using a first interpolation filter or a second interpolation filter differing in a total number of taps from the first interpolation filter; and encodes the current block based on the second prediction image, and in the generating of the second prediction image, the processor switches between using the first interpolation filter and the second interpolation filter depending on whether an affine mode is used for the current block.

公开(公告)号：US20210281871A1

公开(公告)日：2021-09-09

申请号：US17317312

申请日：2021-05-11

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya LI ,  Chong Soon LIM ,  Ru Ling LIAO ,  Han Boon TEO ,  Hai Wei SUN ,  Che Wei KUO ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA

IPC: H04N19/513 ,  H04N19/159 ,  H04N19/139 ,  H04N19/176

Abstract: Provided is an encoder including circuitry and memory coupled to the circuitry. A prediction mode for a current block is an affine mode, and in operation, the circuitry: derives a base motion vector which is a motion vector to be used in a prediction process for the current block, and is a motion vector at an affine-mode control point in the current block; derives a first motion vector different from the base motion vector; derives a motion vector difference based on a difference between the base motion vector and the first motion vector; determines whether the motion vector difference is greater than a threshold; if so, modifies a second motion vector different from the base motion vector and the first motion vector, and if not, does not modify the second motion vector; and encodes the current block using the second motion vector modified or the second motion vector not modified.

公开(公告)号：US20210120235A1

公开(公告)日：2021-04-22

申请号：US17137061

申请日：2020-12-29

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ru Ling LIAO ,  Chong Soon LIM ,  Hai Wei SUN ,  Han Boon TEO ,  Jing Ya LI ,  Sughosh Pavan SHASHIDHAR ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA

IPC: H04N19/105 ,  H04N19/176 ,  H04N19/159

Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.