公开(公告)号：US20230119758A1

公开(公告)日：2023-04-20

申请号：US18071370

申请日：2022-11-29

申请人： Panasonic Intellectual Property Corporation of America

发明人： Jing Ya LI ,  Chong Soon LIM ,  Hai Wei SUN ,  Han Boon TEO ,  Che Wei KUO ,  Chu Tong WANG ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa Toma ,  Yusuke KATO

IPC分类号： H04N19/117 ,  H04N19/105 ,  H04N19/119 ,  H04N19/82 ,  H04N19/13 ,  H04N19/18 ,  H04N19/186 ,  H04N19/124

摘要： An encoder includes circuitry and memory. The circuitry, in operation, generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component. The circuitry generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry generates a third coefficient value by adding the first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value. In the CCALF process, in response to a coordinate of the second reconstructed image sample being (x, y), coordinates of the first reconstructed image samples are (2x, 2y−1), (2x−1, 2y), (2x, 2y), (2x+1, 2y), (2x−1, 2y+1), (2x, 2y+1), (2x+1, 2y+1), and (2x, 2y+2).

公开(公告)号：US20230083364A1

公开(公告)日：2023-03-16

申请号：US18056542

申请日：2022-11-17

申请人： Panasonic Intellectual Property Corporation of America

发明人： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Ru Ling LIAO ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Jing Ya LI

IPC分类号： H04N19/52 ,  H04N19/119 ,  H04N19/176

摘要： An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.

公开(公告)号：US20230075757A1

公开(公告)日：2023-03-09

申请号：US18056136

申请日：2022-11-16

申请人： Panasonic Intellectual Property Corporation of America

发明人： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Ru Ling LIAO ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Jing Ya LI

IPC分类号： H04N19/52 ,  H04N19/119 ,  H04N19/176

摘要： An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.

公开(公告)号：US20230074948A1

公开(公告)日：2023-03-09

申请号：US17984675

申请日：2022-11-10

申请人： Panasonic Intellectual Property Corporation of America

发明人： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA

IPC分类号： H04N19/39 ,  H04N19/88

摘要： An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: encodes one or more pictures which have common time information and each of which is included in a different layer; adds the one or more pictures into one access unit in a bitstream; and adds, into the bitstream, a first flag indicating that a total number of access units present in the bitstream is one.

公开(公告)号：US20230074281A1

公开(公告)日：2023-03-09

申请号：US17987633

申请日：2022-11-15

申请人： Panasonic Intellectual Property Corporation of America

发明人： Tadamasa TOMA ,  Takahiro NISHI ,  Kiyofumi ABE ,  Ryuichi KANOH ,  Chong Soon LIM ,  Sughosh Pavan SHASHIDHAR ,  Ru Ling LIAO ,  Hai Wei SUN ,  Han Boon TEO ,  Jing Ya LI

IPC分类号： H04N19/119 ,  H04N19/157 ,  H04N19/176

摘要： An encoder partitions into blocks using a set of block partition modes. The set of block partition modes includes a first partition mode for partitioning a first block, and a second block partition mode for partitioning a second block which is one of blocks obtained after the first block is partitioned. When the number of partitions of the first block partition mode is three, the second block is a center block among the blocks obtained after partitioning the first block, and the partition direction of the second block partition mode is same as the partition direction of the first block partition mode, the second block partition mode indicates that the number of partitions is only three. A parameter for identifying the second block partition mode includes a first flag indicating a horizontal or vertical partition direction, and does not include a second flag indicating the number of partitions.

公开(公告)号：US20220385908A1

公开(公告)日：2022-12-01

申请号：US17883445

申请日：2022-08-08

申请人： Panasonic Intellectual Property Corporation of America

发明人： Kiyofumi ABE ,  Ryuichi KANOH ,  Takahiro NISHI ,  Tadamasa TOMA

IPC分类号： H04N19/126 ,  H04N19/30 ,  H04N19/18 ,  H04N19/176

摘要： Various embodiments provide an encoder that performs an up-conversion and a down-conversion on a first quantization matrix to generate a second quantization matrix, and quantizes transform coefficients of a current block using the second quantization matrix. The first quantization matrix has a first number of rows and a first number of columns equal to the first number of rows, and the second quantization matrix has a second number of rows and a second number of columns different from the second number of rows. In the up-conversion, the circuitry generates the second quantization matrix such that one of the second number of rows or the second number of columns is larger than the first number of rows. In the down-conversion, the circuitry generates the second quantization matrix such that the other of the second number of rows or the second number of columns is smaller than the first number of rows.

公开(公告)号：US20220385899A1

公开(公告)日：2022-12-01

申请号：US17868199

申请日：2022-07-19

申请人： Panasonic Intellectual Property Corporation of America

发明人： Han Boon TEO ,  Hai Wei SUN ,  Chong Soon LIM ,  Jing Ya LI ,  Chu Tong WANG ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA

IPC分类号： H04N19/117 ,  H04N19/80 ,  H04N19/105 ,  H04N19/46

摘要： An encoder includes circuitry and memory coupled to the circuitry. The circuitry: executes a second process of applying a second filter to the first image to generate a second image, not holding the second image as a reference image, holding the first image as a reference image, and displaying the second image; writes coefficients of each of one or more filter candidates that are candidates for the second filter into a bitstream, wherein the coefficients are included in a first storage location when written into the bitstream; and writes a parameter that specifies, for each image, one of the one or more filter candidates as the second filter into the bitstream, wherein the parameter is included in a second storage location when written into the bitstream, and the second storage location is different from the first storage location.

公开(公告)号：US20220368950A1

公开(公告)日：2022-11-17

申请号：US17873754

申请日：2022-07-26

申请人： Panasonic Intellectual Property Corporation of America

发明人： Masato OHKAWA ,  Hideo SAITOU ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA

IPC分类号： H04N19/80 ,  H04N19/176 ,  H04N19/86

摘要： For a location displaced by four samples in a vertical direction or a horizontal direction from a current location, the encoder performs a first determination of determining only whether the location displaced by four samples is a TU boundary, where the current location is a sample location of a current sub-block boundary on which the determination process is to be performed. In the first determination, when it is determined that the location displaced by four samples is a TU boundary, the encoder sets a maximum filter length to a first value, and in the case otherwise, the encoder performs a second determination of determining whether a location displaced by eight samples in the vertical direction or the horizontal direction from the current location is a TU boundary.

公开(公告)号：US20220360811A1

公开(公告)日：2022-11-10

申请号：US17864906

申请日：2022-07-14

申请人： Panasonic Intellectual Property Corporation of America

发明人： Jing Ya LI ,  Chong Soon LIM ,  Ru Ling LIAO ,  Han Boon TEO ,  Hai Wei SUN ,  Che Wei KUO ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA

IPC分类号： H04N19/513 ,  H04N19/139 ,  H04N19/159 ,  H04N19/176

摘要： Provided is an encoder including circuitry and memory coupled to the circuitry. A prediction mode for a current block is an affine mode, and in operation, the circuitry: derives a base motion vector which is a motion vector to be used in a prediction process for the current block, and is a motion vector at an affine-mode control point in the current block; derives a first motion vector different from the base motion vector; derives a motion vector difference based on a difference between the base motion vector and the first motion vector; determines whether the motion vector difference is greater than a threshold; if so, modifies a second motion vector different from the base motion vector and the first motion vector, and if not, does not modify the second motion vector; and encodes the current block using the second motion vector modified or the second motion vector not modified.

公开(公告)号：US20220329785A1

公开(公告)日：2022-10-13

申请号：US17844936

申请日：2022-06-21

申请人： Panasonic Intellectual Property Corporation of America

发明人： Takahiro NISHI ,  Tadamasa TOMA ,  Kiyofumi ABE

IPC分类号： H04N19/105 ,  H04N19/15

摘要： An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry switches between storing and not storing of a decoded picture buffer (DPB) parameter related to a DPB in a common header shared between layers in layer groups each including at least one output layer, according to whether or not all the layer groups in a bitstream each include only one layer.