公开(公告)号：US20190327490A1

公开(公告)日：2019-10-24

申请号：US16388339

申请日：2019-04-18

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ryuichi KANOH ,  Tadamasa TOMA ,  Takahiro NISHI ,  Kiyofumi ABE ,  Chong Soon LIM ,  Han Boon TEO ,  Ru Ling LIAO ,  Jing Ya LI ,  Sughosh Pavan SHASHIDHAR ,  Hai Wei SUN

IPC: H04N19/60 ,  H04N19/18 ,  H04N19/119 ,  H04N19/176 ,  H04N19/124

Abstract: An encoder includes: circuitry; and memory. Using the memory, the circuitry: performs, when a size of a current block to be subjected to transform processing is not a power of 2, complementary processing of adding a complementary region to the current block to cause the size to be a power of 2; performs transform processing on the current block which has been subjected to the complementary processing; performs inverse transform processing on the current block which has been subjected to the transform processing; and eliminates the complementary region included in the current block which has been subjected to the inverse transform processing.