公开(公告)号：US11303913B2

公开(公告)日：2022-04-12

申请号：US16903996

申请日：2020-06-17

Applicant: QUALCOMM Incorporated

Inventor： Vadim Seregin ,  Muhammed Zeyd Coban ,  Adarsh Krishnan Ramasubramonian

IPC: H04N19/423 ,  H04N19/136 ,  H04N19/172 ,  H04N19/103 ,  H04N19/503 ,  H04N19/70

Abstract: A video decoder is configured to remove pictures from a decoded picture buffer based on the value of an explicitly coded syntax element. A video decoder may be configured to decode a syntax element indicating a picture to remove from a decoded picture buffer, and remove the first picture from the DPB. The video decoder may then decode a current picture, and store the decoded current picture in the DPB.

公开(公告)号：US11233988B2

公开(公告)日：2022-01-25

申请号：US16874091

申请日：2020-05-14

Applicant: QUALCOMM Incorporated

Inventor： Vadim Seregin ,  Muhammed Zeyd Coban

IPC: H04N19/105 ,  H04N19/132 ,  H04N19/159 ,  H04N19/176

Abstract: An example device for coding video data determines a first reference block in a first reference picture for a first block of a current picture. Based on the first reference picture being a different size than the current picture, the device codes the first block with a first inter-coding tool of a first set of inter-coding tools, wherein a first particular tool of a plurality of inter-coding tools is disabled. The device determines a second reference block in a second reference picture for a second block of the current picture. Based on the second reference picture being the same size as the current picture, the device codes the second block with a second inter-coding tool of a second set of inter-coding tools, wherein the first particular tool is enabled.

公开(公告)号：US11228763B2

公开(公告)日：2022-01-18

申请号：US17131046

申请日：2020-12-22

Applicant: QUALCOMM Incorporated

Inventor： Marta Karczewicz ,  Hongtao Wang ,  Alican Nalci ,  Muhammed Zeyd Coban

IPC: H04N19/12 ,  H04N19/18 ,  H04N19/176 ,  H04N19/60

Abstract: An example device includes memory configured to store video data and one or more processors implemented in circuitry and coupled to the memory. The one or more processors are configured to determine whether transform skip mode is used for a current block of the video data. The one or more processors are configured to disable level mapping for residual coding based on transform skip mode being used for the current block. The one or more processors are configured to code the current block without applying level mapping.

公开(公告)号：US20210360290A1

公开(公告)日：2021-11-18

申请号：US17319911

申请日：2021-05-13

Applicant: QUALCOMM Incorporated

Inventor： Vadim Seregin ,  Yong He ,  Muhammed Zeyd Coban ,  Adarsh Krishnan Ramasubramonian

IPC: H04N19/70 ,  H04N19/172 ,  H04N19/174

Abstract: Example techniques and devices are disclosed. An example device for coding video data includes memory configured to store the video data and one or more processors implemented in circuitry and coupled to the memory. The one or more processors are configured to determine whether an entry in a reference picture list for a current picture is equal to no reference picture. Based on the entry being equal to no reference picture, the one or more processors are configured to determine additional information associated with the entry. The one or more processors are configured to check a constraint for the entry based on the additional information and code the current picture in accordance with the constraint.

公开(公告)号：US20210314624A1

公开(公告)日：2021-10-07

申请号：US17220418

申请日：2021-04-01

Applicant: QUALCOMM Incorporated

Inventor： Muhammed Zeyd Coban ,  Vadim Seregin ,  Yong He ,  Yao-Jen Chang

IPC: H04N19/70 ,  H04N19/105 ,  H04N19/169

Abstract: An example method includes decoding, from a picture header syntax structure of a coded video bitstream, a syntax element indicating whether or not a picture associated with the picture header syntax structure may include multiple different types of Network Abstraction Layer (NAL) units; responsive to the syntax element indicating that the picture may include multiple different types of NAL units, decoding a merged subpicture track that includes the picture where each picture in the merged subpicture track refers to a common picture parameter set (PPS); and reconstructing, based on the common PPS, samples of the picture.

公开(公告)号：US11109070B2

公开(公告)日：2021-08-31

申请号：US16948084

申请日：2020-09-02

Applicant: QUALCOMM Incorporated

Inventor： Yao-Jen Chang ,  Vadim Seregin ,  Muhammed Zeyd Coban ,  Adarsh Krishnan Ramasubramonian ,  Marta Karczewicz

IPC: H04N19/70 ,  H04N19/119 ,  H04N19/157 ,  H04N19/174 ,  H04N19/103

Abstract: An example device includes a memory configured to store video data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to determine whether a maximum number of merge candidates for a slice of the video data is equal to a first value. The one or more processors are configured to infer a value of a first syntax element to be equal to a second value based at least in part on the maximum number of merge candidates for the slice being equal to the first value, the first syntax element being indicative of a maximum number of merge candidates and a maximum number of merge candidates of a non-rectangular coding mode. The one or more processors are also configured to decode the slice based on the maximum number of merge candidates and the first syntax element.

公开(公告)号：US20210211685A1

公开(公告)日：2021-07-08

申请号：US17143000

申请日：2021-01-06

Applicant: QUALCOMM Incorporated

Inventor： Hilmi Enes Egilmez ,  Vadim Seregin ,  Muhammed Zeyd Coban ,  Marta Karczewicz

IPC: H04N19/18 ,  H04N19/176 ,  H04N19/44

Abstract: A video decoder may be configured to receive a block of video data, and determine a value of a multiple transform set index for the block of video data based on a presence of non-zero transform coefficients in the block of video data other than a DC coefficient. The video decoder may then apply a transform to the block of video data based on the determined value of the multiple transform set index.

公开(公告)号：US20210203985A1

公开(公告)日：2021-07-01

申请号：US17126585

申请日：2020-12-18

Applicant: QUALCOMM Incorporated

Inventor： Alican Nalci ,  Luong Pham Van ,  Marta Karczewicz ,  Geert Van der Auwera ,  Muhammed Zeyd Coban ,  Hilmi Enes Egilmez

IPC: H04N19/593 ,  H04N19/11 ,  H04N19/176 ,  H04N19/186 ,  H04N19/70 ,  H04N19/132 ,  H04N19/61

Abstract: A video encoder and video decoder may code video data using intra prediction and a block-based delta pulse code modulation (BDPCM) mode. The BDPCM mode may include a vertical mode and a horizontal mode. The video encoder and video decoder may be configured to align the direction of an intra prediction mode to the direction of a BDPCM mode for both luma and chroma blocks.

公开(公告)号：US20210203963A1

公开(公告)日：2021-07-01

申请号：US17131185

申请日：2020-12-22

Applicant: QUALCOMM Incorporated

Inventor： Hongtao Wang ,  Marta Karczewicz ,  Muhammed Zeyd Coban

IPC: H04N19/196 ,  H04N19/176 ,  H04N19/18 ,  H04N19/60

Abstract: An example method of decoding video data includes determining a sum of absolute coefficient values of neighboring transform coefficients of a current transform coefficient of a current block of video data; determining, via performing arithmetic operations on the sum of absolute coefficient values and without using a look-up table that maps between sums of absolute coefficient values and rice parameters, a rice parameter for the current transform coefficient; decoding, using rice-golomb coding and using the determined rice parameter, a value of a remainder of the current transform coefficient; and reconstructing, based on the value of the remainder of the current transform coefficient, the current block of video data.

公开(公告)号：US20210195242A1

公开(公告)日：2021-06-24

申请号：US17125778

申请日：2020-12-17

Applicant: QUALCOMM Incorporated

Inventor： Hilmi Enes Egilmez ,  Muhammed Zeyd Coban ,  Marta Karczewicz ,  Vadim Seregin

IPC: H04N19/60 ,  H04N19/176

Abstract: An example device for decoding video data includes a memory configured to store video data; and one or more processors implemented in circuitry and configured to: determine that a transform block of video data has a size of 8 8 coefficients and that the transform block is transformed using a low-frequency non-separable transform (LFNST); decode at least nine non-zero transform coefficients of the transform block; inverse transform the transform block using an inverse LFNST to reproduce a residual block corresponding to the transform block; and reconstruct a block of the video data using the residual block.