-
公开(公告)号：US20230356397A1
公开(公告)日：2023-11-09
申请号：US17661899
申请日：2022-05-03
Inventor： Benoit Rivot , Xingyu Wang
IPC: B25J9/16
CPC classification number: B25J9/1666 , B25J9/163 , B25J9/1694
Abstract: Cliff Detection in Robotic Devices A method of operating a robotic device includes: moving the robotic device towards an edge of a cliff while a ToF sensor senses reflected signals having been transmitted by the ToF sensor, the reflected signals being generated by the signals transmitted by the ToF sensor being reflected off a target object back to the ToF sensor, the ToF sensor being attached to a front of the robotic device and including an array of single-photon avalanche diode (SPAD) sensors; comparing a statistical distribution of the reflected signals received at a plurality of different rows of zones configured by the array of SPADs in a region of interest (ROI) of the ToF sensor and based on the comparing detecting an approaching of the edge of the cliff; and in response to detecting the approaching of the edge, changing a propulsion of the robotic device before reaching the edge.
-
公开(公告)号：US20230216394A1
公开(公告)日：2023-07-06
申请号：US17646934
申请日：2022-01-04
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.
Inventor： Dino Costanzo , Xiyu Xu , Chengpan Cai
CPC classification number: H02M1/0009 , H02P5/685 , H02P5/505 , H02M7/493
Abstract: An apparatus includes a first inverter configured to drive a first motor having a plurality of phases, the first inverter comprising a plurality of inverter legs, each of which is coupled to a corresponding phase of the first motor, a second inverter configured to drive a second motor having a plurality of phases, the second inverter comprising a plurality of inverter legs, each of which is coupled to a corresponding phase of the second motor, and a first current sensor configured to sense currents flowing in the first inverter and the second inverter, wherein the first current sensor is shared by at least by two inverter legs.
-
公开(公告)号：US11635453B2
公开(公告)日：2023-04-25
申请号：US17378226
申请日：2021-07-16
Inventor： Dino Costanzo , Cheng Pan Cai , Xi Yu Xu
IPC: G01R19/25 , H02P27/08 , H02M1/00 , G01R15/14 , H02M7/5387
Abstract: A three-phase load is powered by a PWM (e.g., SVPWM) driven DC-AC inverter having a single shunt-topology. A shunt voltage and a branch voltage of the inverter (across a transistor to be calibrated) are measured during a second period of each SVPWM sector, and the drain-to-source resistance of the calibrated transistor is calculated. During the fourth period of each SVPWM sector, the branch voltage is measured again, and another branch voltage across another transistor is measured. Using the drain-to-source resistance of the calibrated transistor and the voltage across the calibrated transistor measured during the fourth period, the phase current through the calibrated transistor is calculated. Using the other branch voltage measured during the fourth period and the drain-to-source resistance of its corresponding transistor (known from a prior SVPWM sector), the phase current through that transistor is calculated. From the two calculated phase currents, the other phase current can be calculated.
-
公开(公告)号：US11626757B2
公开(公告)日：2023-04-11
申请号：US16931137
申请日：2020-07-16
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.
Inventor： Jiasheng Wang
Abstract: A method and system for operating a power circuit capable of transmitting and receiving wireless power. The method includes determining that the power circuit is operating in receive mode, and, based thereon, having a first equivalent capacitance. The method further includes determining that the power circuit is operating in the transmit mode, and, based thereon, having a second equivalent capacitance. The first equivalent capacitance being different than the second equivalent capacitance.
-
公开(公告)号：US11463052B2
公开(公告)日：2022-10-04
申请号：US17107269
申请日：2020-11-30
Inventor： Hong Wu Lin , Giovanni Gonano , Edoardo Botti
IPC: H03F3/217 , H03K17/687 , H03K19/20 , H04R3/00
Abstract: In an embodiment, a method for shaping a PWM signal includes: receiving an input PWM signal; generating an output PWM signal based on the input PWM signal by: when the input PWM signal transitions with a first edge of the input PWM signal, transitioning the output PWM signal with a first edge of the output PWM signal; and when the input PWM signal transitions with a second edge before the first edge of the output PWM signal transitions, delaying a second edge of the output PWM signal based on the first edge of the output PWM signal.
-
Patent Agency Ranking
116.发明申请公开(公告)号：US20220138485A1
公开(公告)日：2022-05-05
申请号：US17512080
申请日：2021-10-27
Inventor： Etienne Bossart , Ji Nan Li , Thomas Perotto
Abstract: In an embodiment a method for detecting a presence of at least one object in a field of view of a time of flight sensor includes successively generating, by the time of flight sensor, histograms, each histogram comprising several classes associating a number of photons detected at a given acquisition period, adding several successively generated histograms so as to obtain a summed histogram and analyzing the summed histogram to detect the presence of at least one object in the field of view of the time of flight sensor.
-
公开(公告)号：US20220021242A1
公开(公告)日：2022-01-20
申请号：US16931137
申请日：2020-07-16
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.
Inventor： Jiasheng Wang
Abstract: A method and system for operating a power circuit capable of transmitting and receiving wireless power. The method includes determining that the power circuit is operating in receive mode, and, based thereon, having a first equivalent capacitance. The method further includes determining that the power circuit is operating in the transmit mode, and, based thereon, having a second equivalent capacitance. The first equivalent capacitance being different than the second equivalent capacitance.
-
公开(公告)号：US20210135660A1
公开(公告)日：2021-05-06
申请号：US16991126
申请日：2020-08-12
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.
Inventor： Hong Wu LIN
Abstract: A filtering circuit for filtering a pulse width modulated (PWM) signal includes a D flip-flop having an input terminal configured to be coupled to a logic high signal and having an output terminal coupled to an output terminal of the filtering circuit; and a circuit coupled between an input terminal of the filtering circuit and the D flip-flop, the circuit configured to, for a first pulse of the PWM signal having a duty cycle within a pre-determined range: generate a positive pulse at a clock terminal of the D flip-flop as a clock signal of the D flip-flop; and generate a negative pulse at a reset terminal of the D flip-flop as a reset signal of the D flip-flop, wherein a duration between a rising edge of the positive pulse and a falling edge of the negative pulse is equal to a duration of the first pulse of the PWM signal.
-
公开(公告)号：US10965263B2
公开(公告)日：2021-03-30
申请号：US16354760
申请日：2019-03-15
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.
Inventor： Ru Feng Du , Qi Yu Liu
IPC: H03F3/217 , H03G1/04 , H03K19/017 , H03K19/20 , H03K19/003 , H03G3/30 , H03K19/096
Abstract: In an embodiment, a class-D amplifier includes an input terminal configured to receive an input signal; a comparator having an input coupled to the input terminal; a deglitching circuit having an input coupled to an output of the comparator; and a driving circuit having an input coupled to an output of the deglitching circuit. The deglitching circuit includes a logic circuit coupled between the input of the deglitching circuit and the output of the deglitching circuit. The logic circuit is configured to receive a clock signal having the same frequency as the switching frequency of the class-D amplifier.
-
公开(公告)号：US20200169234A1
公开(公告)日：2020-05-28
申请号：US16695010
申请日：2019-11-25
Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.
Inventor： XiangSheng Li , Ru Feng Du
Abstract: An audio amplifier includes: a buck controller configured to control an output voltage at a first supply terminal, the output voltage selected from a set including a plurality of output voltages, where the output voltage takes a settling time to settle; a first audio bridge including: a class-AB driver stage coupled to the first supply terminal, and a delay insertion circuit configured to receive a processed digital stream and provide the processed digital stream to the class-AB driver stage a delay time after receiving the processed digital stream, where the delay time is based on the settling time; and an audio amplitude detector configured to detect a first peak amplitude in the first digital audio stream, where the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus a headroom voltage.
-
-
-
-
-
-
-
-
-
Search Results
201
records
(took 0.035 seconds)
