公开(公告)号：US06222218B1

公开(公告)日：2001-04-24

申请号：US09152835

申请日：1998-09-14

申请人： Rajarao Jammy ,  Jack A. Mandelman ,  Carl J. Radens

发明人： Rajarao Jammy ,  Jack A. Mandelman ,  Carl J. Radens

IPC分类号： H01L27108

CPC分类号： H01L27/10861

摘要： The present invention relates to a process of fabricating semiconductor memory structures, particularly deep trench semiconductor memory devices wherein a temperature sensitive high dielectric constant material is incorporated into the storage node of the capacitor. Specifically, the present invention describes a process for forming deep trench storage capacitors after high temperature shallow trench isolation and gate conductor processing. This process allows for the incorporation of a temperature sensitive high dielectric constant material into the capacitor structure without causing decomposition of that material. Furthermore, the process of the present invention limits the extent of the buried-strap outdiffusion, thus improving the electrical characteristics of the array MOSFET.

摘要翻译： 本发明涉及制造半导体存储器结构，特别是深沟槽半导体存储器件的工艺，其中将温度敏感的高介电常数材料并入电容器的存储节点中。 具体地，本发明描述了在高温浅沟槽隔离和栅极导体处理之后形成深沟槽存储电容器的工艺。 该过程允许将温度敏感的高介电常数材料并入电容器结构中而不会导致该材料的分解。 此外，本发明的方法限制了埋层扩散的程度，从而改善阵列MOSFET的电特性。

公开(公告)号：US06177696B1

公开(公告)日：2001-01-23

申请号：US09133203

申请日：1998-08-13

申请人： Gary B. Bronner ,  Laertis Economikos ,  Rajarao Jammy ,  Byeongju Park ,  Carl J. Radens ,  Martin E. Schrems

发明人： Gary B. Bronner ,  Laertis Economikos ,  Rajarao Jammy ,  Byeongju Park ,  Carl J. Radens ,  Martin E. Schrems

IPC分类号： H01L2972

CPC分类号： H01L27/10861 ,  H01L21/32155 ,  H01L27/10829 ,  H01L28/84 ,  H01L29/66181 ,  H01L29/945

摘要： A trench capacitor structure suitable for use in a semiconductor integrated circuit device and the process sequence used to form the structure. The trench capacitor provides increased capacitance by including a capacitor plate consisting of textured, hemispherical-grained silicon. The trench capacitor also includes a buried plate to reduce depletion of stored charge from the capacitor.

摘要翻译： 适用于半导体集成电路器件的沟槽电容器结构和用于形成该结构的工艺顺序。 沟槽电容器通过包括由纹理化的半球形硅组成的电容器板来提供增加的电容。 沟槽电容器还包括掩埋板，以减少来自电容器的存储电荷的耗尽。