Abstract:
A semiconductor chip includes a first functional element having a first electronic functional-element parameter exhibiting a dependence relating to the mechanical stress present in the semiconductor circuit chip, and being configured to provide a first output signal, a second functional element having a second electronic functional-element parameter exhibiting a dependence in relation to the mechanical stress present in the semiconductor circuit chip, and being configured to provide a second output signal in dependence on the second electronic functional-element parameter and the mechanical stress, and a combination means for combining the first and second output signals to obtain a resulting output signal exhibiting a predefined dependence on the mechanical stress present in the semiconductor circuit chip, the first and second functional elements being integrated on the semiconductor circuit chip and arranged, geometrically, such that that the first and second functional-element stress influence functions are identical within a tolerance range.
Abstract:
The invention is direct to a comparator circuit that maps an analog input signal into a digital output signal and comprises a threshold as well as an upper and a lower hysteresis threshold. Given transgression of the upper or lower hysteresis threshold by the analog input signal, at least one unlatch signal is formed that enables the switching of the digital output signal when the analog input signal upwardly transgresses the threshold. Independently of at least one unlatch signal, the digital output signal is inventively switched when the analog input signal transgresses the upper or lower hysteresis threshold.
Abstract:
The invention provides a method for switching from a first operating condition of an integrated circuit to a second operating condition of the integrated circuit differing from the first operating condition. To that end, the output signal generated at a circuit output is externally overwritten. The inventive method or the inventive integrated circuit have the advantage that the switching from one operating condition into another operating condition of the integrated circuit can be implemented in a very simple way but with a high immunity to interference. The switching can be very easily initiated as needed because the only thing needed is the application of a voltage level—which is already available in the system—to an output of the integrated circuit. Furthermore, the selection of a circuit output assures that there is a high certainty that the switching condition will not accidentally occur because this is largely precluded by the standard and usually prescribed external interconnection of a circuit output.
Abstract:
A frequency compensation circuit includes a first and a second compensation capacitor for a frequency-compensated amplifier to which a chopped useful signal can be supplied. In a first clock phase, the useful signal is respectively supplied to the first compensation capacitor, and in a second clock phase the useful signal is respectively supplied to the second compensation capacitor. As a result, a stable, frequency-compensated amplifier is specified in which charge reversal in the frequency compensation capacitors or Miller capacitors is avoided, making possible a configuration with a small chip area. The principle is suited particularly to Hall sensors operated in chopped mode.
Abstract:
A circuit member has an inner switching arrangement having an operating voltage line and a ground connecting line connecting on a switching circuit a ground contact to the inner switching arrangement. A reverse polarity protective device has a protective transistor arranged in the ground connecting line. During normal operation, defined by having an operating voltage applied to the operating voltage line and by having a ground potential applied to the ground connecting line, the protective transistor is in a conducting state. In a reverse polarity situation, defined by having the operating voltage applied to the ground connecting line and by having the ground potential applied to the operating voltage line, the protective transistor is in a non-conducting state. The protective transistor is configured to carry a high operational voltage in the reverse polarity situation.
Abstract:
A Hall sensor has a Hall plate having terminals for supplying a supply current and for tapping a Hall voltage. A Hall circuit connects the terminals. A device for orthogonally switching the supply current and the Hall voltage between a first set of the terminals and a second set of the terminals, arranged orthogonally to the first set of terminals, is provided wherein a geometry of the Hall plate is identical for the first and second sets of the terminals. A summation device is configured to receive measured Hall voltage values from the first and second sets of the terminals and to determine an offset-compensated Hall voltage value. The summation device is configured to receive and/or process the Hall voltage values of the first and second set of the terminals such that, for stress measurement, a portion of the Hall voltage values resulting from the magnetic field acting on the Hall sensor are compensated and only the portion of the Hall voltage values resulting from the offset are measured. A temperature measurement is possible wherein at least one current of the Hall sensor circuit having a predetermined temperature coefficient is used whose voltage drop at the resistor of the Hall circuitry is determined for temperature measurement.
Abstract:
A circuit and method automatically compensate a monolithic integrated Hall sensor having a Hall element therein, wherein a device for generating operating currents is technologically and thermally tightly coupled with the Hall element. The production-induced and temperature-induced variations in the sensitivity of the Hall element are compensated for by a defined control of the supply current and the offset current. For the control, the thermal and technological parameters of the Hall element semiconductor region or equivalent regions in corresponding circuits are used. For this purpose, at least two current sources are provided which generate at least two auxiliary currents with different temperature dependences. By means of adding/subtracting devices, resultant currents with other temperature dependences are formed from the auxiliary currents by summation/subtraction and different weighting.