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    VOLTAGE DIVIDER CIRCUITS UTILIZING NON-VOLATILE MEMORY DEVICES
    1.
    发明公开
    VOLTAGE DIVIDER CIRCUITS UTILIZING NON-VOLATILE MEMORY DEVICES 审中-公开

    公开(公告)号：US20240137038A1

    公开(公告)日：2024-04-25

    申请号：US18156171

    申请日：2023-01-18

    Applicant: TetraMem Inc.

    Inventor： Ning Ge ,  Hengfang Zhu ,  Sangsoo Lee ,  Wenbo Yin

    IPC: H03M1/36

    CPC classification number: H03M1/365

    Abstract: The present disclosure provides a voltage divider circuit utilizing non-volatile memory devices. The non-volatile memory device may include, for example, a memristor device, an MRAM (Magnetoresistive random access memory) device, a phase-change memory (PCM) device, a floating gate, a spintronic device, etc. The voltage divider circuit may include one or more first non-volatile memory devices that form a resistor ladder. The resistor ladder may produce a plurality of reference voltages when the resistor ladder is connected between two voltages.

    Delta-sigma digital radiometric system
    4.
    发明授权
    Delta-sigma digital radiometric system 有权

    公开(公告)号：US09983304B2

    公开(公告)日：2018-05-29

    申请号：US14627094

    申请日：2015-02-20

    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION

    Inventor： Andrew D. Smith ,  Leland Gilreath ,  Khanh Thai

    IPC: G01S3/02 ,  G01S13/89 ,  H03M1/48 ,  H03M1/18 ,  H03M1/20 ,  H03M1/36

    CPC classification number: G01S13/89 ,  H03M1/182 ,  H03M1/20 ,  H03M1/365 ,  H03M1/48

    Abstract: A passive radiometric system for thermally imaging objects in a scene. The system includes a digital square-law quantizer circuit including a plurality of comparators and a voltage divider network having a plurality of resistors. Each comparator receives a different reference signal generated by the voltage divider network and a common power signal from an antenna and outputs a high or low digital bit signal. The system also includes a delta-sigma circuit having a weighting table responsive to the digital bit signals from the comparators that converts the digital bit signals to a normalized bit word. The delta-sigma circuit also includes an accumulator that receives the digital bit words from the weighting table and provides an average of the digital bit words. The system also includes a digital-to-analog converter that converts the averaged bit words to an analog signal that is provided as a feedback signal to the quantizer circuit.

    Electronic Switching and Protection Circuit
    6.
    发明申请
    Electronic Switching and Protection Circuit 审中-公开

    公开(公告)号：US20170294918A1

    公开(公告)日：2017-10-12

    申请号：US15094463

    申请日：2016-04-08

    Applicant: Infineon Technologies AG

    Inventor： Robert Illing ,  Christian Djelassi ,  Markus Ladurner ,  David Jansson

    IPC: H03M1/12 ,  H02H3/38

    CPC classification number: H03M1/124 ,  H02H3/087 ,  H02H3/0935 ,  H02H3/10 ,  H02H3/202 ,  H02H3/38 ,  H02H5/041 ,  H03M1/365

    Abstract: An embodiment electronic circuit includes an electronic switch comprising a load path, a first protection circuit configured to generate a first protection signal based on a current-time-characteristic of a load current through the load path of the electronic switch, and a drive circuit configured to drive the electronic switch based on the first protection signal. The first protection circuit includes an analog-to-digital converter (ADC) configured to receive an ADC input signal representing the load current, to sample the ADC input signal once in each of a plurality of successive sampling periods, and to output an ADC output signal that includes a sequence of values such that each of the values represents a respective sample of the ADC input signal. The ADC is configured to pseudo-randomly select a sample time in each sampling period.

    Flash ADC with interpolators
    9.
    发明授权
    Flash ADC with interpolators 有权
    带内插器的闪存ADC

    公开(公告)号：US09467160B2

    公开(公告)日：2016-10-11

    申请号：US14538013

    申请日：2014-11-11

    Applicant: MediaTek Inc.

    Inventor： Wen-Hua Chang

    IPC: H03M1/12 ,  H03M1/20 ,  H03M1/36

    CPC classification number: H03M1/205 ,  H03M1/206 ,  H03M1/361 ,  H03M1/365

    Abstract: An ADC is provided. The ADC includes a plurality of pre-amplifiers, dynamic comparators coupled to the pre-amplifiers, interpolators and an encoder. Each pre-amplifier provides a pair of differential outputs according to a pair of differential analog signals and a first reference voltage and a second reference voltage different from the first reference voltage. Each dynamic comparator provides a first comparing signal and a second comparing signal according to the pair of differential outputs of the corresponding pre-amplifier. Each interpolator provides an interpolating signal according to the first and second comparing signals of two of the dynamic comparators. The encoder provides a digital output according to the interpolating signals. The first and second comparing signals are the same in a reset phase, and the first and second comparing signals are complementary according to the pair of differential outputs of the corresponding pre-amplifier in an evaluation phase.

    Abstract translation: 提供了一个ADC。 ADC包括多个预放大器，耦合到前置放大器，内插器和编码器的动态比较器。 每个前置放大器根据一对差分模拟信号和不同于第一参考电压的第一参考电压和第二参考电压提供一对差分输出。 每个动态比较器根据相应的前置放大器的差分输出对提供第一比较信号和第二比较信号。 每个内插器根据两个动态比较器的第一和第二比较信号提供内插信号。 编码器根据内插信号提供数字输出。 第一和第二比较信号在复位阶段相同，并且第一和第二比较信号根据评估阶段中对应的前置放大器的差分输出的对而互补。

    Measurement Circuit
    10.
    发明申请
    Measurement Circuit 审中-公开
    测量电路

    公开(公告)号：US20160169947A1

    公开(公告)日：2016-06-16

    申请号：US14964659

    申请日：2015-12-10

    Applicant: Dialog Semiconductor (UK) Limited

    Inventor： Michele De Fazio ,  Andrea Acquas ,  Fabio Rigoni

    IPC: G01R19/30 ,  H03K5/24 ,  G01R19/10

    CPC classification number: G01R19/30 ,  G01R19/10 ,  H03K5/24 ,  H03M1/182 ,  H03M1/365 ,  H03M1/66

    Abstract: A measurement circuit for providing the maximum and/or minimum voltage of a time-variant electrical input signal is presented. The measurement circuit contains a voltage reference unit to provide voltage reference signals and a comparator unit comprising multiple comparators. Each comparator receiving the electrical input signal at a first comparator input and a different voltage reference signal from the voltage reference unit at its second comparator input. The comparator unit provides comparator output signals based on said electrical input signal and said voltage reference signals. A logic unit receives the comparator output signals and provides a voltage output signal indicative of the maximum and/or minimum voltage of the electrical input signal based on the comparator output signals.The logic unit provides adaptation information to the voltage reference entity. The is adaptation information is dependent on the comparator output signals. The voltage reference unit adapts the voltage reference signals based on the adaption information.

    Abstract translation: 提供了用于提供时变电输入信号的最大和/或最小电压的测量电路。 测量电路包含提供电压参考信号的电压参考单元和包括多个比较器的比较器单元。 每个比较器在第一比较器输入处接收电输入信号，并在其第二比较器输入处接收来自电压参考单元的不同参考电压信号。 比较器单元基于所述电输入信号和所述电压参考信号提供比较器输出信号。 逻辑单元接收比较器输出信号，并且基于比较器输出信号提供表示电输入信号的最大和/或最小电压的电压输出信号。 逻辑单元向电压参考实体提供自适应信息。 自适应信息取决于比较器的输出信号。 电压基准单元根据适应信息适应电压参考信号。

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