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公开(公告)号：US20200321866A1
公开(公告)日：2020-10-08
申请号：US16375526
申请日：2019-04-04
申请人： Ambiq Micro, Inc.
发明人： Ivan Bogue , Yousof Mortazavi
摘要： A buck converter is disclosed that may operate in a low power mode or a high power mode based on a power requirements of a load. In the high power mode, modifications to increase frequency response include a higher polling frequency for a comparator, a lower impedance divider in a feedback circuit, a higher biasing current for a comparator, and larger switches for providing current to a reactive step-down circuit of the buck converter. In the low power mode these modifications are reversed. The buck converter may make use of an improved strong arm comparator and a circuit for sensing presence of an inductor in the reactive step-down circuit.
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公开(公告)号：US10795390B1
公开(公告)日：2020-10-06
申请号：US16774780
申请日：2020-01-28
摘要： A circuit for providing temperature compensation to a sense signal having a first temperature coefficient includes a temperature compensation circuit receiving a temperature sense signal indicative of a temperature associated with the sense signal where the temperature compensation circuit is digitally configurable by at least one digital signal to generate a compensating impedance signal having a second temperature coefficient. The compensating impedance signal provides an impedance value in response to the temperature sense signal. The compensating impedance signal is applied to modify the sense signal to provide a modified sense signal having substantially zero temperature coefficient over a first frequency range. The circuit further includes an amplifier circuit receiving the modified sense signal and generating an output signal indicative of the sense signal where the output signal has substantially zero temperature coefficient over the first frequency range.
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公开(公告)号：US20200313542A1
公开(公告)日：2020-10-01
申请号：US16368731
申请日：2019-03-28
发明人： Prabal Upadhyaya
摘要： A method, system and computer program product for improving inductor current ramp down times in a DC-to-DC converter having an inductor conductively coupled to a low side transistor on a first side and an or-ing transistor coupled to a second side, where the DC-to-DC converter is in a phase redundant power supply. The method comprises turning off the low side transistor and turning off the or-ing transistor in response to an unloading transient.
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124.发明申请公开(公告)号：US20200310477A1
公开(公告)日：2020-10-01
申请号：US16582401
申请日：2019-09-25
发明人： Ikhwan KIM , Nomiyama TAKAHIRO , Jiseon PAEK , Jaeyeol HAN
摘要： A regulating circuit including a first direct current (DC)-DC converter configured to apply a first supply voltage to a first node in a first mode and apply the first supply voltage to a second node in a second mode, a first low drop output (LDO) regulator connected to the first node, the first LDO regulator configured to provide an output voltage to an output node by regulating the first supply voltage of the first node, and a second LDO regulator connected to the first node, the second LDO regulator configured to provide an auxiliary current to the first node in the second mode may be provided.
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公开(公告)号：US10784780B1
公开(公告)日：2020-09-22
申请号：US16593881
申请日：2019-10-04
摘要： A controller circuit for generating a Pulse-Width Modulation (PWM) signal for activating a switching device of a Switched-Mode Power Supply (SMPS) includes gap detection circuitry, Pulse Frequency Modulated (PFM) circuitry, PWM circuitry and logic circuitry. The gap detection circuitry is configured to generate a shift signal based on an indication of a voltage difference between a reference voltage and a feedback voltage corresponding to voltage output by the SMPS. The PFM circuitry is configured to generate a hold signal indicating a target PFM frequency for the PWM signal. The PWM circuitry is configured to shift, based on the shift signal, a pedestal current to generate a shifted pedestal current and to generate, based on the shifted pedestal current, a peak signal indicating a target PWM on time for the PWM signal.
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公开(公告)号：US20200287464A1
公开(公告)日：2020-09-10
申请号：US16292113
申请日：2019-03-04
发明人： Danzhu Lu , Langyuan Wang , Jie He
摘要： This disclosure describes techniques for controlling switching regulator switching operations. The techniques include selecting a given one of a plurality of clock signals based on a control signal. The techniques further include generating, by the switching regulator, an output voltage from an input voltage by controlling one or more switches according to a switching frequency that corresponds to the selected given one of the plurality of clock signals. The techniques further include varying the switching frequency of the switching regulator by changing a value of the control signal, used to select the given one of the plurality of clock signals, according to a given one of a plurality of refresh rate control signals that corresponds to the selected given one of the plurality of clock signals having respective values that correspond to respective ones of the plurality of refresh rate control signals.
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公开(公告)号：US20200287460A1
公开(公告)日：2020-09-10
申请号：US16497454
申请日：2018-03-05
IPC分类号： H02M3/157 , H01S3/102 , B23K9/073 , H05B45/3725 , H02M7/48
摘要： Response fluctuation of output current due to fluctuation of input voltage is reduced by control device (CM) including current fluctuation reduction control means (CFC) that is a regulator for regulating any of an output current command signal, a current detection value, and a control gain when the input voltage fluctuates.
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公开(公告)号：US20200274448A1
公开(公告)日：2020-08-27
申请号：US16515375
申请日：2019-07-18
发明人： Weibing JING , Liang ZHANG , Dan LI , Qi YANG
摘要： A converter system includes a first converter that includes a synchronizing terminal configured to receive a frequency signal, a synchronizing unit configured to generate a synchronizing signal having a phase shift with respect to the frequency signal, wherein the phase shift is generated based on amplitude of the frequency signal, and a regulator configured to convert a first given signal to a first converted signal, wherein the regulator is phase locked with the synchronizing signal.
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公开(公告)号：US10756618B2
公开(公告)日：2020-08-25
申请号：US16455907
申请日：2019-06-28
发明人： Wei-Wen Ou , Shih-Chieh Chen , Chien-Sheng Chen
摘要： A regulator device includes a first switch, a second switch, a protecting circuit, and a driving circuit. The first switch is configured to receive power supply voltage. One terminal of the second switch and the first switch are coupled at a node. The other terminal of the second switch is coupled to ground. The protecting circuit is coupled to the node, and outputs at least one protecting signal according to the turn on/off state of the first switch and the second switch and the voltage of the node. The driving circuit is coupled to the first switch, the second switch, and the protecting circuit, and turns off the first switch or the second switch according the at least one protecting signal.
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公开(公告)号：US20200244171A1
公开(公告)日：2020-07-30
申请号：US16851326
申请日：2020-04-17
发明人： Simon Chaput , Gu-Yeon Wei
摘要： A driver for a circuit with a capacitive load is configured for coupling to a voltage source which provides a DC input voltage, and is configured to generate an output voltage at an output. The driver includes a bidirectional synchronous power converter with a first switch, a second switch, and an inductive device connected to the first and/or second switch. A controller is configured to control the first switch and the second switch. The bidirectional synchronous power converter generates a switching voltage from the input voltage at a switching node and generates the output voltage having an analog voltage waveform with a peak amplitude of at least twice the input voltage. The bidirectional synchronous power converter includes a boost-buck converter configured to generate the analog voltage waveform from the input voltage by transferring increments of energy to the capacitive load in a forward-boost mode and from the load in a reverse-buck mode.
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