JUNCTION FIELD EFFECT TRANSISTOR (JFET) STRUCTURE AND METHODS TO FORM SAME

    公开(公告)号:US20210091236A1

    公开(公告)日:2021-03-25

    申请号:US16790084

    申请日:2020-02-13

    Abstract: A junction field effect transistor (JFET) structure includes a doped polysilicon gate over a channel region of a semiconductor layer. The doped polysilicon gate has a first doping type. A raised epitaxial source is on the source region of the semiconductor layer and adjacent a first sidewall of the doped polysilicon gate, and has a second doping type opposite the first doping type. A raised epitaxial drain is on the drain region of the semiconductor layer and adjacent a second sidewall of the doped polysilicon gate, and has the second doping type. A doped semiconductor region is within the channel region of the semiconductor layer and extending from the source region to the drain region, and a non-conductive portion of the semiconductor layer is within the channel region to separate the doped semiconductor region from the doped polysilicon gate.

    Temperature-sensitive bias circuit
    132.
    发明授权

    公开(公告)号:US10931274B2

    公开(公告)日:2021-02-23

    申请号:US16252007

    申请日:2019-01-18

    Abstract: One illustrative device includes, among other things, an active device comprising a first terminal, a first bias resistor connected to the first terminal, and a first resistor comprising a first phase transition material connected in parallel with the first bias transistor, wherein the first phase transition material exhibits a first low conductivity phase for temperatures less than a first phase transition temperature and a first high conductivity phase for temperatures greater than the first phase transition temperature.

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