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141.发明申请公开(公告)号：US20190260389A1
公开(公告)日：2019-08-22
申请号：US16400934
申请日：2019-05-01
Inventor： Sung-Ik PARK , Heung-Mook KIM , Sun-Hyoung KWON , Nam-Ho HUR
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 4/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
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公开(公告)号：US20190253082A1
公开(公告)日：2019-08-15
申请号：US16395117
申请日：2019-04-25
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1102 , H03M13/1165 , H03M13/255 , H03M13/271 , H03M13/2778 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0058 , H04L1/0071
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
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143.发明申请公开(公告)号：US20190230199A1
公开(公告)日：2019-07-25
申请号：US16313790
申请日：2017-07-05
Inventor： Bo-Mi LIM , Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
IPC: H04L29/08
Abstract: An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal; a power normalizer configured to reduce power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing time-interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling start position information and size information for each of Physical Layer Pipes (PLPs). In this case, the Physical Layer Pipes include a core layer physical layer pipe corresponding to the core layer signal and an enhanced layer physical layer pipe corresponding to the enhanced layer signal.
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公开(公告)号：US20190229754A1
公开(公告)日：2019-07-25
申请号：US16369742
申请日：2019-03-29
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , G06F11/1004 , G06F11/1076 , G11B20/1806 , G11B20/1809 , G11B2020/185 , H03M13/1102 , H03M13/1165 , H03M13/255 , H03M13/27 , H03M13/2778
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 1024-symbol mapping.
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公开(公告)号：US20190222231A1
公开(公告)日：2019-07-18
申请号：US16353423
申请日：2019-03-14
Inventor： Bo-Mi LIM , Sun-Hyoung KWON , Sung-Ik PARK , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2732 , H04L1/0043 , H04L1/0048 , H04L1/0057 , H04L1/0059 , H04L1/007 , H04L1/0071 , H04L47/6245
Abstract: An apparatus and method for time interleaving corresponding to hybrid time interleaving mode are disclosed. An apparatus for time interleaving according to an embodiment of the present invention includes a twisted block interleaver configured to perform intra-subframe interleaving corresponding to time interleaving blocks; and a convolutional delay line configured to perform inter-subframe interleaving using an output of the twisted block interleaver.
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Patent Agency Ranking
公开(公告)号：US20190052287A1
公开(公告)日：2019-02-14
申请号：US16100268
申请日：2018-08-10
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Nam-Ho HUR , Heung-Mook KIM
CPC classification number: H03M13/116 , H03M13/1105 , H03M13/118 , H03M13/6516 , H04L1/0057
Abstract: Disclosed herein are a channel coding/decoding method in which a parity check matrix is transformed and an apparatus using the same. The channel-coding method includes loading a first exponent matrix, transforming the first exponent matrix into a second exponent matrix, creating a parity check matrix corresponding to a required block size using the second exponent matrix, and performing LDPC encoding using the parity check matrix.
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147.发明申请公开(公告)号：US20190020354A1
公开(公告)日：2019-01-17
申请号：US16136073
申请日：2018-09-19
Inventor： Sung-Ik PARK , Heung-Mook KIM , Sun-Hyoung KWON , Nam-Ho HUR
CPC classification number: H03M13/1165 , H03M13/1102 , H03M13/116 , H03M13/1185 , H04L1/0041 , H04L1/0057 , H04L1/0058
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 3/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
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148.发明申请公开(公告)号：US20180367361A1
公开(公告)日：2018-12-20
申请号：US16111071
申请日：2018-08-23
Inventor： Sung-Ik PARK , Jae-Young LEE , Sun-Hyoung KWON , Heung-Mook KIM , Nam-Ho HUR
Abstract: An apparatus and method for multiplexing signals using layered division multiplexing are disclosed. A signal multiplexing apparatus according to an embodiment of the present invention includes a combiner configured to combine a core layer signal and an enhanced layer signal at different power levels, and a time interleaver configured to perform interleaving applied to both the core layer signal and the enhanced layer signal.
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公开(公告)号：US20180351609A1
公开(公告)日：2018-12-06
申请号：US15993023
申请日：2018-05-30
Inventor： Sung-Ik PARK , Bo-Mi LIM , Sun-Hyoung KWON , Heung-Mook KIM , Jae-Hyun SEO , Jae-Young LEE , Nam-Ho HUR , Hoi-Yoon JUNG , David GOMEZ-BARQUERO , Eduardo GARRO
IPC: H04B7/0413 , H04L25/02
CPC classification number: H04B7/0413 , H04L1/00 , H04L1/0668 , H04L25/0204 , H04L25/022 , H04L25/0224 , H04L25/03343 , H04L25/03891
Abstract: Disclosed herein are a method for transceiving a broadcast signal using a combination of multiple antenna schemes with layered division multiplexing and an apparatus for the method. A method for receiving a broadcast signal includes generating received signals based on signals that are received through multiple receiving antennas, estimating channels between the receiving antennas and transmitting antennas, restoring a core-layer signal corresponding to the received signals, and restoring an enhanced-layer signal based on a cancellation process, wherein the cancellation process corresponds to the core-layer signal and is separately performed for the individual receiving antennas.
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公开(公告)号：US20180145777A1
公开(公告)日：2018-05-24
申请号：US15786401
申请日：2017-10-17
Inventor： Byung-Jun BAE , Hye-Ju OH , Yong-Seong CHO , Heung-Mook KIM , Joon-Young JUNG , Nam-Ho HUR
IPC: H04H20/78 , H04H40/90 , H04N21/236 , H04N21/2362 , H04N21/2381 , H04N21/2665 , H04N7/10
CPC classification number: H04H20/78 , H04H20/63 , H04H20/95 , H04H40/27 , H04H40/90 , H04H60/82 , H04N7/10 , H04N7/106 , H04N21/23608 , H04N21/2362 , H04N21/2381 , H04N21/2665 , H04N21/4344 , H04N21/4345 , H04N21/6112
Abstract: Disclosed herein are an apparatus and method for converting a broadcast signal. The apparatus for converting a broadcast signal includes a demultiplexer unit for receiving a terrestrial broadcast signal and generating a terrestrial signaling signal, a signaling conversion unit for converting the terrestrial signaling signal into a cable signaling signal by parsing the terrestrial signaling signal, a cable multiplexer unit for generating a cable broadcast signal by multiplexing the cable signaling signal, and a cable modulation unit for modulating the cable broadcast signal and transmitting the cable broadcast signal over a cable network.
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