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151.发明申请LOW DENSITY PARITY CHECK ENCODER HAVING LENGTH OF 64800 AND CODE RATE OF 7/15, AND LOW DENSITY PARITY CHECK ENCODING METHOD USING THE SAME 有权低密度奇偶校验编码器的长度为64800，编码速率为7/15，低密度奇偶校验编码方法使用该方法公开(公告)号：US20150100844A1
公开(公告)日：2015-04-09
申请号：US14496700
申请日：2014-09-25
Inventor： Sung-Ik PARK , Heung-Mook KIM , Sun-Hyoung KWON , Nam-Ho HUR
IPC: H03M13/11
CPC classification number: H03M13/1157 , H03M13/1165 , H03M13/1177 , H03M13/616 , H03M13/618
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 7/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
Abstract translation: 公开了一种低密度奇偶校验（LDPC）编码器，LDPC解码器和LDPC编码方法。 LDPC编码器包括第一存储器，第二存储器和处理器。 第一存储器存储长度为64800和码率为7/15的LDPC码字。 第二存储器被初始化为0.处理器通过使用与奇偶校验矩阵（PCM）相对应的序列执行相对于第二存储器的累积来生成与信息位对应的LDPC码字。
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152.发明公开公开(公告)号：US20240162918A1
公开(公告)日：2024-05-16
申请号：US18419393
申请日：2024-01-22
Inventor： Sung-Ik PARK , Heung-Mook KIM , Sun-Hyoung KWON , Nam-Ho HUR
CPC classification number: H03M13/1157 , H03M13/1165 , H03M13/1177 , H03M13/616 , H03M13/618
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 7/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
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公开(公告)号：US20230268935A1
公开(公告)日：2023-08-24
申请号：US18309278
申请日：2023-04-28
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2757 , H04L27/20 , H03M13/2792 , H04L27/3416 , H03M13/255 , H04L1/0057 , H04L1/0071 , H03M13/116 , H03M13/1185 , H03M13/2778 , H03M13/1102 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0058
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.
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公开(公告)号：US20230022090A1
公开(公告)日：2023-01-26
申请号：US17780446
申请日：2020-11-24
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE
Abstract: An apparatus for transmitting a broadcast signal according to an embodiment of the present invention includes a bootstrap generation unit for generating a bootstrap for signaling a system bandwidth field, corresponding to a system bandwidth for a post-bootstrap, and a baseband sampling rate coefficient; a preamble generation unit for generating a preamble located immediately following the bootstrap in a broadcast signal frame; and a payload generation unit for generating one or more subframes located immediately following the preamble in the broadcast signal frame.
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公开(公告)号：US20220360282A1
公开(公告)日：2022-11-10
申请号：US17864144
申请日：2022-07-13
Inventor： Sung-Ik PARK , Heung-Mook KIM , Sun-Hyoung KWON , Nam-Ho HUR
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 7/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
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Patent Agency Ranking
公开(公告)号：US20220302927A1
公开(公告)日：2022-09-22
申请号：US17835651
申请日：2022-06-08
Inventor： Sung-Ik PARK , Heung-Mook KIM , Sun-Hyoung KWON , Nam-Ho HUR
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 16200 and a code rate of 3/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
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公开(公告)号：US20220216931A1
公开(公告)日：2022-07-07
申请号：US17700751
申请日：2022-03-22
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
IPC: H04H20/67 , H04H20/71 , H04L1/00 , H04L69/323 , H04L27/26 , H04H20/31 , H04H60/44 , H04J11/00 , H04H60/73 , H04W52/32
Abstract: An apparatus for transmitting broadcasting signal using transmitter identification scaled by 4-bit injection level code and method using the same are disclosed. An apparatus for transmitting broadcasting signal according to an embodiment of the present invention includes a waveform generator configured to generate a host broadcasting signal; a transmitter identification signal generator configured to generate a transmitter identification signal for identifying a transmitter, the transmitter identification signal scaled by an injection level code; and a combiner configured to inject the transmitter identification signal into the host broadcasting signal in a time domain so that the transmitter identification signal is transmitted synchronously with the host broadcasting signal.
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公开(公告)号：US20210359708A1
公开(公告)日：2021-11-18
申请号：US17386373
申请日：2021-07-27
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Bo-Mi LIM , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
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159.发明申请公开(公告)号：US20210266013A1
公开(公告)日：2021-08-26
申请号：US17315450
申请日：2021-05-10
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM
Abstract: A parity puncturing apparatus and method for variable length signaling information are disclosed. A parity puncturing apparatus according to an embodiment of the present invention includes memory configured to provide a parity bit string for parity puncturing for the parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, and a processor configured to puncture a number of bits corresponding to a final puncturing size from the rear side of the parity bit string.
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160.发明申请公开(公告)号：US20210152412A1
公开(公告)日：2021-05-20
申请号：US17140430
申请日：2021-01-04
Inventor： Sung-Ik PARK , Jae-Young LEE , Sun-Hyoung KWON , Heung-Mook KIM
Abstract: An apparatus and method for broadcast signal frame using a bootstrap and a preamble are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a time interleaver configured to generate a time-interleaved signal by performing interleaving on a BICM output signal; and a frame builder configured to generate a broadcast signal frame including a bootstrap and a preamble using the time-interleaved signal.
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