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公开(公告)号：US11656925B2
公开(公告)日：2023-05-23
申请号：US17138036
申请日：2020-12-30
Applicant: Texas Instruments Incorporated
Inventor： Kedar Satish Chitnis , Charles Lance Fuoco , Sriramakrishnan Govindarajan , Mihir Narendra Mody , William A. Mills , Gregory Raymond Shurtz , Amritpal Singh Mundra
CPC classification number: G06F9/546 , G06F9/3836 , G06F9/45558 , G06F9/4806 , G06F9/5027 , G06F2009/45583 , G06F2009/45587
Abstract: This disclosure relates to various implementations an embedded computing system. The embedded computing system comprises a hardware accelerator (HWA) thread user and a second HWA thread user that creates and sends out message requests. The HWA thread user and the second HWA thread user is communication with a microcontroller (MCU) subsystem. The embedded computing system also comprises a first inter-processor communication (IPC) interface between the HWA thread user and the MCU subsystem and a second IPC interface between the second HWA thread user and the MCU subsystem, where the first IPC interface is isolated from the second IPC interface. The MCU subsystem is also in communication with a first domain specific HWA and a second domain specific HWA.
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公开(公告)号：US11653105B2
公开(公告)日：2023-05-16
申请号：US17110139
申请日：2020-12-02
Applicant: Texas Instruments Incorporated
Inventor： Gang Hua , Shashank Dabral , Mihir Narendra Mody , Rajasekhar Reddy Allu , Niraj Nandan
CPC classification number: H04N23/88 , H04N9/78 , H04N23/71 , H04N23/741 , H04N23/76
Abstract: A method for local automatic white balance (AWB) of wide dynamic range (WDR) images is provided that includes collecting statistics for local AWB by an image signal processor (ISP) from a first WDR image generated by the ISP, receiving, by the ISP, a plurality of local gain lookup tables (LUTs), one for each color channel, wherein the plurality of local gain LUTs is generated using the statistics, and applying, by the ISP, a gain value to each pixel in a second WDR image generated by the ISP, wherein the gain value for the pixel is determined by the ISP using the local gain LUT for the color channel of the pixel.
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公开(公告)号：US11551399B2
公开(公告)日：2023-01-10
申请号：US17015172
申请日：2020-09-09
Applicant: Texas Instruments Incorporated
Inventor： Mihir Narendra Mody , Ajay Jayaraj , Hemant Hariyani , Anand Balagopalakrishnan , Jason A. T. Jones , Erick Zadiel Narvaez
Abstract: Methods, apparatus, systems and articles of manufacture to perform graphics processing on combinations of graphic processing units and digital signal processors are disclosed. A disclosed example method includes processing first data representing input vertices to create second data, the first data using a first format organized by vertex, the second data using a second format organized by components of the vertices. A digital signal processor (DSP) is to perform vertex shading on the second data to create third data, the third data formatted using the second format, the vertex shading performed by executing a first instruction at the DSP, the first instruction generated based on a second instruction capable of being executed at a graphics processing unit (GPU). The third data is processed to create fourth data, the fourth data formatted using the first format.
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公开(公告)号：US20220408106A1
公开(公告)日：2022-12-22
申请号：US17893297
申请日：2022-08-23
Applicant: Texas Instruments Incorporated
Inventor： Hetul Sanghvi , Mihir Narendra Mody , Niraj Nandan , Mahesh Madhukar Mehendale , Subrangshu Das , Dipan Kumar Mandal , Nainala Vyagrheswarudu , Vijayavardhan Baireddy , Pavan Venkata Shastry
IPC: H04N19/43
Abstract: A video hardware engine which support dynamic frame padding is disclosed. The video hardware engine includes an external memory. The external memory stores a reference frame. The reference frame includes a plurality of reference pixels. A motion estimation (ME) engine receives a current LCU (largest coding unit), and defines a search area around the current LCU for motion estimation. The ME engine receives a set of reference pixels corresponding to the current LCU. The set of reference pixels of the plurality of reference pixels are received from the external memory. The ME engine pads a set of duplicate pixels along an edge of the reference frame when a part area of the search area is outside the reference frame.
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公开(公告)号：US20220375022A1
公开(公告)日：2022-11-24
申请号：US17879251
申请日：2022-08-02
Applicant: Texas Instruments Incorporated
Abstract: A computer vision system is provided that includes a camera capture component configured to capture an image from a camera, a memory, and an image compression decompression engine (ICDE) coupled to the memory and configured to receive each line of the image, and compress each line to generate a compressed bit stream. To compress a line, the ICDE is configured to divide the line into compression units, and compress each compression unit, wherein to compress a compression unit, the ICDE is configured to perform delta prediction on the compression unit to generate a delta predicted compression unit, compress the delta predicted compression unit using exponential Golomb coding to generate a compressed delta predicted compression unit, and add the compressed delta predicted compression unit to the compressed bit stream.
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Patent Agency Ranking
公开(公告)号：US20220229773A1
公开(公告)日：2022-07-21
申请号：US17538662
申请日：2021-11-30
Applicant: Texas Instruments Incorporated
Inventor： Sriramakrishnan Govindarajan , Kishon Vijay Abraham Israel Vijayponraj , Mihir Narendra Mody , Vijaya Rama Raju Kanumuri , Cory Dean Stewart
Abstract: A system is provided. In some examples, the system includes a first peripheral circuit and a memory management circuit coupled to the first peripheral circuit. The memory management circuit comprises a first table that associates virtual identification values with address space select values. The system also includes a transaction mapper circuit coupled to the memory management circuit. The transaction mapper circuit comprises a second table that associates virtual identification values with bus-device-function values.
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公开(公告)号：US11330153B2
公开(公告)日：2022-05-10
申请号：US16442137
申请日：2019-06-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Gang Hua , Mihir Narendra Mody , Rajasekhar Reddy Allu , Niraj Nandan , Shashank Dabral
Abstract: In some examples, a method comprises receiving pixel data from an image capture device having a color filter, wherein the pixel data represents a portion of an image. The method further includes performing wavelet decomposition on the pixel data to produce decomposed pixel data and determining a local intensity of the pixel data. The method also includes determining a noise threshold value based on the local intensity and a noise intensity function that is based on the color filter; determining a noise value for the pixel data based on the decomposed pixel data and the noise threshold value; and correcting the pixel data based on the noise value to produce an output image.
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公开(公告)号：US11228769B2
公开(公告)日：2022-01-18
申请号：US14294711
申请日：2014-06-03
Applicant: Texas Instruments Incorporated
Inventor： Mihir Narendra Mody
IPC: H04N19/174 , H04N19/436
Abstract: A video hardware engine with multi-threading functionality is disclosed. The video hardware engine includes a video hardware accelerator unit and a controller. The controller is coupled to the video hardware accelerator unit. The controller operates in an encode mode and a decode mode. In the encode mode, the controller receives a plurality of frames and encode attributes associated with each frame of the plurality of frames. The encode attributes associated with a frame of the plurality of frames is processed to generate encode parameters associated with the frame. The video hardware accelerator unit is configured to process the frame based on the encode parameters to generate an output. The output of the video hardware accelerator unit is processed to generate a compressed bit-stream and an encode status. In decode mode, the controller receives a compressed bit-stream and decode attributes and generates a plurality of frames and a decode status.
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公开(公告)号：US11006124B2
公开(公告)日：2021-05-11
申请号：US16889962
申请日：2020-06-02
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Hrushikesh Tukaram Garud , Mihir Narendra Mody , Soyeb Nagori
IPC: H04N19/117 , H04N19/147 , H04N19/182 , H04N19/149 , H04N19/82 , H04N19/176
Abstract: The disclosure provides a sample adaptive offset (SAO) encoder. The SAO encoder includes a statistics collection (SC) block and a rate distortion optimization (RDO) block coupled to the SC block. The SC block receives a set of deblocked pixels and a set of original pixels. The SC block categorizes each deblocked pixel of the set of deblocked pixels in at least one of a plurality of band and edge categories. The SC block estimates an error in each category as difference between a deblocked pixel of the set of deblocked pixels and corresponding original pixel of the set of original pixels. The RDO block determines a set of candidate offsets associated with each category and selects a candidate offset with a minimum RD cost. The minimum RD cost is used by a SAO type block and a decision block to generate final offsets for the SAO encoder.
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公开(公告)号：US20210055970A1
公开(公告)日：2021-02-25
申请号：US17012223
申请日：2020-09-04
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Niraj Nandan , Hetul Sanghvi , Mihir Narendra Mody
Abstract: A hardware thread scheduler (HTS) is provided for a multiprocessor system. The HTS is configured to schedule processing of multiple threads of execution by resolving data dependencies between producer modules and consumer modules for each thread. Pattern adaptors may be provided in the scheduler that allows mixing of multiple data patterns across blocks of data. Transaction aggregators may be provided that allow re-using the same image data by multiple threads of execution while the image data remains in a given data buffer. Bandwidth control may be provided using programmable delays on initiation of thread execution. Failure and hang detection may be provided using multiple watchdog timers.
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