Abstract:
A server apparatus has an electronic map information database into which is stored electronic map data, and a spot information database into which is stored information regarding an arbitrary location in electronic map data sent from a terminal, the terminal apparatus being configured so as to enable viewing of information stored in the spot information database via an electronic network. By this configuration, it is possible for a user to store information with regard to an arbitrary location on the electronic map into the spot information database and to later verify the information stored by the user, thereby enabling the server apparatus to provide a service that suits the individual user's style.
Abstract:
First communication data is in a first transmission protocol and serial in first communication cycles. The first communication data is accumulated and then transmitted at second communication cycles. The first communication data is then converted into second communication data in a second transmission protocol. The first communication data is received in accordance with a first clock signal supplied together with the first communication data. The accumulated first communication data is transmitted in accordance with a second clock signal. The difference in transmission protocol and transmission timings between the first and second communication data is thereby eliminated.
Abstract:
A digital contents distribution system has a multi-layered structure including a server device (CS device) of one or a small number of managers which are each to be a manager main body, a plurality of server devices (DS devices) of middle managers, and client terminal devices (SC terminal devices) of a large number of users. Accesses from the respective users are processed in the server devices of respective ones of the middle managers. It is therefore possible to prevent an inconvenience in which the accesses from a large number of users concentrate on the CS device of the manager. As a result, it is possible to reduce the load imposed on the CS device, and to perform a smooth distribution service of digital contents.
Abstract:
Abstract of DisclosureAn image processing apparatus includes a normal vector mapping section for dividing a surface of an object into a plurality of divided surfaces and generating a first normal vector pointing to the vertical direction of each of the divided surfaces, a luminance value mapping section for replacing the first normal vector of each divided surface with a luminance value associated with one of a predetermined number of second normal vectors, each associated with a different luminance value, which is most analogous in characteristic to the first normal vector, and a graphic processor for shading each divided surface according to the replaced luminance value.
Abstract:
An integrated circuit chip includes a substrate having edges defining an inner area; circuit modules located on the substrate; and input/output terminals for inputting and outputting one or more signals to and from the circuit modules. The input/output terminals include (i) input/output terminals used for operation, which input/output one or more operation signals during operation of the circuit modules, and (ii) input/output terminals used for inspection of the circuit modules. The input/output terminals used for operation are arranged along the edges of the substrate, and the circuit modules and the input/output terminals used for inspection are arranged on the inner area of the substrate.
Abstract:
Routine processing for routine data, non-routine processing for routine data and general non-routine processing are to be processed efficiently. To this end, a main CPU has a CPU core having a parallel computational mechanism, a command cache and a data cache as ordinary cache units, and a scratch-pad memory SPR which is an internal high-speed memory capable of performing direct memory accessing (DMA) suited for routine processing. A floating decimal point vector processor (VPE) has an internal high-speed memory (VU-MEM) capable of DMA processing and is tightly connected to the main CPU to form a co-processor. The VPE has a high-speed internal memory (VU-MEM) capable of DMA processing. The DMA controller (DMAC) controls DMA transfer between the main memory and the SPR, between the main memory and the (VU-MEM) and between the (VU-MEM) and the SPR.
Abstract:
Abstract of DisclosureThe present invention provides an image processor to use images taken by an image pickup device, etc. as an input interface to enter commands, etc. The present invention provides an image processor that includes image capturing means for capturing a mirrored moving image partially including a moving target, image generating means for generating an object image expressing a predetermined object according to the movement of the target included in the mirrored moving image captured by the image capturing means and controlling means for combining the object image generated by this image generating means with the captured mirrored moving image and displaying the combined image on a predetermined display device.
Abstract:
A main memory stores an operating guidance program for displaying operating guidance on a display monitor and enabling control members of a manual control input device to emit continuous or flickering light in relating to the operating guidance. Based on a command from the manual control input device, a CPU executes the operating guidance program stored in the main memory. The operating guidance program enables the control members to emit continuous or flickering light sequentially and displays operating guidance for at least the control members which are emitting continuous or flickering light on the display monitor. Not only the operating guidance is displayed on the display monitor, but also visual sensations are given to the game player by controlling the control members to emit continuous or flickering light on the manual control input device.
Abstract:
Abstract of DisclosureAn image producing device includes two or more vector processors for conducting geometry processing for expressing the respective images in parallel to produce graphic element lists, a graphic processor for conducting graphic processing on the basis of the graphic element lists, and an arbitrator. The graphic processor includes two buffers for storing graphic contexts corresponding to the graphic element lists together with identification information on the graphic contexts, and a unit for reading a specific graphic context from the buffers upon inputting the graphic element lists from the arbitrator to conduct the graphic processing. Each of the vector processors produces the graphic element lists having, as their contents, the identification information of the graphic context specified by the geometry processing assigned to each of the vector processors.
Abstract:
A portable electronic device includes: a communication block configured to communicate with another portable electronic device different from said portable electronic device; an information acquisition block configured to acquire relation information that is information about a relation between a user of said portable electronic device and a user of said other portable electronic device from an external server through a network when said communication block communicates with said other electronic device; and a notification block configured to notify the user of said portable electronic device of the relation information acquired by said information acquisition block.