公开(公告)号：US20020135583A1

公开(公告)日：2002-09-26

申请号：US10154110

申请日：2002-05-22

Applicant: Sony Computer Entertainment Inc.

Inventor： Akio Ohba

IPC: G06F015/80

CPC classification number: G06F13/28

Abstract: Routine processing for routine data, non-routine processing for routine data and general non-routine processing are to be processed efficiently. To this end, a main CPU has a CPU core having a parallel computational mechanism, a command cache and a data cache as ordinary cache units, and a scratch-pad memory SPR which is an internal high-speed memory capable of performing direct memory accessing (DMA) suited for routine processing. A floating decimal point vector processor (VPE) has an internal high-speed memory (VU-MEM) capable of DMA processing and is tightly connected to the main CPU to form a co-processor. The VPE has a high-speed internal memory (VU-MEM) capable of DMA processing. The DMA controller (DMAC) controls DMA transfer between the main memory and the SPR, between the main memory and the (VU-MEM) and between the (VU-MEM) and the SPR.

Abstract translation: 对日常数据的常规处理，常规数据的非常规处理和一般的非常规处理进行有效的处理。 为此，主CPU具有具有并行计算机制的CPU核心，作为普通高速缓存单元的命令高速缓存和数据高速缓存，以及作为能够执行直接存储器访问的内部高速存储器的暂存存储器SPR （DMA）适用于常规处理。 浮动小数点向量处理器（VPE）具有能够进行DMA处理的内部高速存储器（VU-MEM），并且与主CPU紧密连接以形成协处理器。 VPE具有能够进行DMA处理的高速内部存储器（VU-MEM）。 DMA控制器（DMAC）控制主存储器和SPR之间，主存储器和（VU-MEM）之间以及（VU-MEM）和SPR之间的DMA传输。

公开(公告)号：US20040268080A1

公开(公告)日：2004-12-30

申请号：US10677955

申请日：2003-10-02

Applicant: Sony Computer Entertainment Inc.

Inventor： Akio Ohba

IPC: G06F012/00

CPC classification number: G06F9/3887 ,  G06F9/30036 ,  G06F9/345 ,  G06F9/3879 ,  G06F15/8007

Abstract: A surface computer includes an address generator for generating an address for adjusting surface region data concerning at least a storage region and a concurrent computer, provided at a subsequent stage of the address generator, having a plurality of unit computers.

公开(公告)号：US20030126035A1

公开(公告)日：2003-07-03

申请号：US10286731

申请日：2002-10-31

Applicant: Sony Computer Entertainment Inc.

Inventor： Tomokazu Kake ,  Akio Ohba

IPC: G06F017/60

CPC classification number: A63F13/57 ,  A63F13/10 ,  A63F13/12 ,  A63F13/35 ,  A63F13/52 ,  A63F13/61 ,  A63F13/79 ,  A63F2300/208 ,  A63F2300/50 ,  A63F2300/5506 ,  A63F2300/64 ,  A63F2300/66 ,  G06Q30/02

Abstract: An apparatus for displaying an object such as a billboard in a virtual world is provided. An input history of a user's operation for moving a character in the virtual world is obtained. The movement track of the character in the virtual world is also obtained. The position and direction of the billboard are changed according to the input history and the movement track so that the billboard is visible to the user. For instance, on a street where the user is expected to move at a high speed, the direction of the billboard is changed so that its display surface can face the front of the character and the billboard is displayed in a position far away from the user's viewing position.

Abstract translation: 提供了一种用于在虚拟世界中显示诸如广告牌的对象的装置。 获得用于移动虚拟世界中的角色的用户操作的输入历史。 还获得了虚拟世界中人物的运动轨迹。 广告牌的位置和方向根据输入历史和移动轨迹而改变，使广告牌对用户可见。 例如，在用户希望高速移动的街道上，改变广告牌的方向，使得其显示面可以面对角色的前方，并且广告牌被显示在远离用户的位置的位置 观看位置。

公开(公告)号：US20040230748A1

公开(公告)日：2004-11-18

申请号：US10836039

申请日：2004-04-29

Applicant: Sony Computer Entertainment Inc.

Inventor： Akio Ohba

IPC: G06F012/00

CPC classification number: G06F9/3802 ,  G06F9/383 ,  G06F9/3836 ,  G06F12/0862

Abstract: A prefetch command control apparatus is provided. A protocol slot generation unit, when receiving from a CPU a prefetch command in which a utilization time of data to be prefetched is specified, generates a protocol slot based on the utilization time and registers it in a schedule list storage unit. When receiving a regular access command, the protocol slot generation unit registers a protocol slot in a regular protocol queue storage unit. A cost evaluation unit evaluates an issuance cost of the prefetch command based on a cache retention time of data to be prefetched and evaluates an issuance cost of the regular access command based on a resource occupation cost. A protocol issuance unit decides which command shall be issued, the prefetch command or regular access command, based on the evaluation result of these issuance costs.

Abstract translation: 提供了一种预取命令控制装置。 一种协议时隙生成单元，当从CPU接收到指定要预取的数据的使用时间的预取命令时，基于所述利用时间生成协议时隙，并将其登记在调度列表存储单元中。 当接收到常规访问命令时，协议时隙生成单元在常规协议队列存储单元中注册协议时隙。 成本评估单元基于要预取的数据的高速缓存保留时间来评估预取命令的发行成本，并且基于资源占用成本来评估常规访问命令的发行成本。 协议发布单元根据这些发行成本的评估结果来决定发出哪个命令，预取命令或定时访问命令。

公开(公告)号：US20040085321A1

公开(公告)日：2004-05-06

申请号：US10694482

申请日：2003-10-27

Applicant: Sony Computer Entertainment Inc.

Inventor： Masaaki Oka ,  Akio Ohba ,  Masayoshi Tanaka

IPC: G06T001/00 ,  G06F015/00 ,  G09G005/36

CPC classification number: G06T15/005 ,  A63F2300/203

Abstract: The present invention relates to the architecture and use of a computer system optimized for the efficient modeling of graphics. The computer system has a primary processor and a graphics processor. The primary processor has two vector processor units within it, one which is closely connected to central processor unit. Simultaneously performing complex modeling calculations on the first vector processor and CPU, and geometry transformation calculations on the second vector processor, allows for efficient modeling of graphics. Furthermore, the graphics processor is optimized to rapidly switch between data flows from the two vector processors. In addition, the graphics processor is able to render many pixels simultaneously, and has a local memory on the graphics processor chip that acts as a frame buffer, texture buffer, and z buffer. This allows a high fill rate to the frame buffer.

Abstract translation: 本发明涉及针对图形的有效建模而优化的计算机系统的架构和用途。 计算机系统具有主处理器和图形处理器。 主处理器内有两个矢量处理器单元，一个与中央处理器单元紧密连接。 同时对第一个矢量处理器和CPU执行复杂建模计算，并在第二个矢量处理器上进行几何变换计算，可以对图形进行有效的建模。 此外，图形处理器被优化以在来自两个向量处理器的数据流之间快速切换。 此外，图形处理器能够同时渲染许多像素，并且在图形处理器芯片上具有作为帧缓冲器，纹理缓冲器和z缓冲器的本地存储器。 这允许帧缓冲器的高填充率。

公开(公告)号：US20040066384A1

公开(公告)日：2004-04-08

申请号：US10653791

申请日：2003-09-02

Applicant: Sony Computer Entertainment Inc.

Inventor： Akio Ohba

IPC: G06T015/00

CPC classification number: G06T15/20 ,  G06T2210/36 ,  G06T2210/52

Abstract: An image processing apparatus for performing rendering processing of three-dimensional objects is provided. An object storage unit stores the three-dimensional data of the object and the array data of B-box which encloses the spatial region which the object occupies. A grouping unit reads in the B-box array from the object storage unit, does grouping of multiple B-boxes into groups based on the object characteristics and level of detail information. A rendering processing unit derives a brick in which there are B-boxes belonging to the same group and generates image data by doing rendering processing independently by brick to be stored in an image storage unit. A consolidation unit consolidates the image data per brick stored in the image storage unit and generates the final output image data to be displayed.

Abstract translation: 提供了一种用于执行三维对象的渲染处理的图像处理装置。 对象存储单元存储物体的三维数据和包围对象所占据的空间区域的B盒的阵列数据。 分组单元从对象存储单元读入B框阵列，根据对象特征和细节信息级别，将多个B框分组成组。 渲染处理单元导出其中存在属于同一组的B框的砖，并且通过以砖独立地进行渲染处理来生成图像数据以存储在图像存储单元中。 合并单元整合存储在图像存储单元中的每个砖的图像数据，并生成要显示的最终输出图像数据。

公开(公告)号：US20030055984A1

公开(公告)日：2003-03-20

申请号：US10146345

申请日：2002-05-15

Applicant: Sony Computer Entertainment Inc.

Inventor： Keiso Shimakawa ,  Shuji Hiramatsu ,  Masakazu Suzuoki ,  Akio Ohba ,  Toyoshi Okada ,  Shigeru Enomoto ,  Muneki Shimada ,  Tomokazu Kake ,  Yousuke Kimoto ,  Kenjiro Komaki ,  Hiromasa Horie ,  Takahiro Fujii ,  Yuta Kimura ,  Hidehisa Onai

IPC: G06F015/16 ,  G06F019/00 ,  G06F017/00 ,  A63F009/24 ,  A63F013/00

CPC classification number: A63F13/31 ,  A63F13/12 ,  A63F13/332 ,  A63F13/35 ,  A63F13/71 ,  A63F13/73 ,  A63F13/77 ,  A63F13/79 ,  A63F2300/406 ,  A63F2300/407 ,  A63F2300/50 ,  A63F2300/5546 ,  A63F2300/69 ,  H04L67/38

Abstract: A communication device communicates information via a virtual world configured by a server machine to client terminal devices operating characters in the virtual world. It is therefore possible to transmit various information to and to receive various information from the virtual world, even from a place remote from the client terminal devices, which enables a linking between the virtual world and the real world to be realized.

Abstract translation: 通信设备经由由服务器机器配置的虚拟世界将信息传送到在虚拟世界中操作字符的客户终端设备。 因此，即使从远离客户终端设备的地方也可以向虚拟世界发送各种信息以及从虚拟世界接收各种信息，从而能够实现虚拟世界和现实世界之间的链接。

公开(公告)号：US20040130637A1

公开(公告)日：2004-07-08

申请号：US10693231

申请日：2003-10-23

Applicant: Sony Computer Entertainment Inc.

Inventor： Tomokazu Kake ,  Akio Ohba ,  Akira Suzuki

IPC: H04N005/262

CPC classification number: G06T3/0093 ,  G06T11/00 ,  G06T2210/44 ,  H04N5/262 ,  H04N5/2625

Abstract: A rectangular-parallelopiped space (box space) expresses the moving images by use of a virtual space. A plurality of frames contained in the moving images appear continuously along time axis. The box space is cut through by a desired surface, and an image projected on this cut surface is projected onto a plane parallel in the direction of time axis. Images sequentially projected onto the plane are outputted as new moving images.

Abstract translation: 矩形平行六面体空间（盒子空间）通过使用虚拟空间来表达运动图像。 包含在运动图像中的多个帧沿时间轴连续出现。 盒子空间被所需的表面切割，并且投影在该切割表面上的图像被投影到与时间轴方向平行的平面上。 作为新的运动图像输出顺序投影到平面上的图像。