公开(公告)号：US07282407B1

公开(公告)日：2007-10-16

申请号：US09008525

申请日：1998-06-29

Applicant: Young-woo Park ,  Jun-yong Noh ,  Bon-young Koo ,  Chang-jin Kang ,  Chul Jung ,  Seok-woo Nam

Inventor： Young-woo Park ,  Jun-yong Noh ,  Bon-young Koo ,  Chang-jin Kang ,  Chul Jung ,  Seok-woo Nam

IPC: H01L21/8242

CPC classification number: H01L27/10852 ,  H01L27/10855 ,  H01L27/10885

Abstract: A semiconductor memory device and method of manufacturing a semiconductor memory device that prevents oxidation of the bit lines caused by misalignment which may occur when patterning a storage electrode. An oxidation preventing layer, such as a nitride layer, is formed over the bit lines or in the contact holes to eliminate the diffusion of oxygen into the bit line structure, thereby preventing oxidation of the bit lines.

Abstract translation: 一种半导体存储器件和半导体存储器件的制造方法，该半导体存储器件防止当图案化存储电极时可能发生的由不对准引起的位线的氧化。 在位线或接触孔中形成诸如氮化物层的氧化防止层，以消除氧向位线结构的扩散，从而防止位线的氧化。

公开(公告)号：US06271124B1

公开(公告)日：2001-08-07

申请号：US09395291

申请日：1999-09-13

Applicant: Jin-Gyoo Choi ,  Jun-Yong Noh

Inventor： Jin-Gyoo Choi ,  Jun-Yong Noh

IPC: H01L2144

CPC classification number: H01L27/10852 ,  H01L21/76819 ,  H01L27/10814 ,  H01L27/10885 ,  H01L27/10894

Abstract: A semiconductor memory device with a capacitor-over-bitline (COB) structure and a method for fabricating the same. The semiconductor memory device includes a transistor having a gate electrode formed on a gate insulating layer on a semiconductor substrate and having source and drain regions formed on the surface of the substrate and separated from each other by the gate electrode, a first interlayer insulating layer formed over the substrate including the transistor; a bitline formed over the first interlayer insulating layer; and a second interlayer insulating layer formed over the substrate including the bitline, for insulating the bitline from a storage node of a capacitor. A surface of the second interlayer insulating layer is planarized by a chemical-mechanical polishing (CMP) process so as to be substantially parallel to a surface of the substrate including the bitline.

Abstract translation: 一种具有电容器 - 位线（COB）结构的半导体存储器件及其制造方法。 半导体存储器件包括晶体管，其晶体管具有形成在半导体衬底上的栅极绝缘层上并具有源极和漏极区的栅电极，该栅极和漏极区形成在衬底的表面上并被栅电极彼此分离，形成第一层间绝缘层 在包括晶体管的衬底上; 在所述第一层间绝缘层上形成的位线; 以及形成在包括所述位线的所述基板的上方的用于使所述位线与电容器的存储节点绝缘的第二层间绝缘层。 通过化学机械抛光（CMP）工艺将第二层间绝缘层的表面平坦化，以便基本平行于包括位线的衬底的表面。