公开(公告)号：US08599199B2

公开(公告)日：2013-12-03

申请号：US13075870

申请日：2011-03-30

Applicant: Jun Yong Noh ,  Hui Cheol Hwang ,  Kye Hyun Kim

Inventor： Jun Yong Noh ,  Hui Cheol Hwang ,  Kye Hyun Kim

IPC: G06T15/00 ,  G06T1/00 ,  G06F17/00 ,  G09G5/00

CPC classification number: G06T17/05 ,  G06T17/205

Abstract: Disclosed herein are a stereoscopic image generation method of background terrain scenes, a system using the same, and a recording medium for the same. The stereoscopic image generation method of background terrain scenes includes an initial mesh creation step of creating an initial mesh using terrain geometry based on image sequences, a geometry error correction step of generating a projection map, detecting error regions of the initial mesh using the generated projection map, generating a vector map of the detected error regions, and generating a corrected mesh, error of which is corrected, and a stereo conversion step of generating a stereoscopic image using the corrected mesh. Since the stereoscopic image is generated based on the mesh, the mesh fits the terrain shape even though the geometry is complex. Further, time coherence can be enforced, the mesh can be edited easily, and new elements can be unseamingly composed into the terrain. Thus, it is possible to prevent a viewer who views the stereoscopic image from becoming tired.

Abstract translation: 这里公开了背景地形场景的立体图像生成方法，使用该场景的系统及其记录介质。 背景地形场景的立体图像生成方法包括：基于图像序列的地形几何生成初始网格的初始网格划分步骤，生成投影图的几何误差校正步骤，使用所生成的投影来检测初始网格的误差区域 映射，生成检测到的误差区域的矢量图，并且生成其校正的校正网格，以及立体声转换步骤，使用校正的网格生成立体图像。 由于基于网格生成立体图像，所以即使几何形状复杂，网格也适合于地形。 此外，可以实施时间一致性，可以容易地编辑网格，并且可以将新的元素无缝地组合到地形中。 因此，可以防止观看立体图像的观看者变得厌倦。

公开(公告)号：US20120007855A1

公开(公告)日：2012-01-12

申请号：US13075842

申请日：2011-03-30

Applicant: Jun Yong Noh ,  In Shik Noh ,  Jung Jin Lee ,  Sung Woo Choi

Inventor： Jun Yong Noh ,  In Shik Noh ,  Jung Jin Lee ,  Sung Woo Choi

IPC: G06T15/00

CPC classification number: H04N13/128 ,  H04N13/156

Abstract: Disclosed herein are a method and a system for stereoscopic three-dimensional (3D) cartoon conversion and a recording medium for the same. In accordance with the method and the system for stereoscopic 3D cartoon conversion and the recording medium for the same, a two-dimensional (2D) digital still image and an alpha map image including depth information are received, and a depth information range, absolute binocular parallax, relative binocular parallax and a screen position are simultaneously controlled based on the depth information included in the alpha map image and a user input, thereby generating a stereoscopic 3D cartoon. Accordingly, it is possible to maximize productivity as compared to a manual operation.

Abstract translation: 本文公开了用于立体三维（3D）卡通转换的方法和系统以及用于其的记录介质。 根据用于立体3D卡通转换的方法和系统及其用于其的记录介质，接收包括深度信息的二维（2D）数字静止图像和阿尔法地图图像，并且深度信息范围，绝对双目 视差，相对双眼视差和屏幕位置同时被控制，基于包括在阿尔法地图图像和用户输入中的深度信息，由此产生立体3D卡通。 因此，与手动操作相比，可以最大限度地提高生产率。

公开(公告)号：US20090233437A1

公开(公告)日：2009-09-17

申请号：US12402976

申请日：2009-03-12

Applicant: Seong-Ho Kim ,  Jun-Yong Noh

Inventor： Seong-Ho Kim ,  Jun-Yong Noh

IPC: H01L21/768

CPC classification number: H01L27/10814 ,  H01L27/0207 ,  H01L27/10852 ,  H01L28/90

Abstract: A method of manufacturing a semiconductor device and a semiconductor device manufactured thereby are provided. The method includes forming a molding layer on a substrate, forming support patterns spaced apart from each other on the molding layer, forming storage node electrodes penetrating the molding layer on sidewalls of the support patterns and wherein the storage node electrodes are supported by the support patterns. The method further includes removing the molding layer, forming a dielectric layer on the storage node electrodes, and forming a plate electrode on the dielectric layer.

Abstract translation: 提供一种制造半导体器件的方法和由其制造的半导体器件。 该方法包括在基板上形成模制层，在模制层上形成彼此分开的支撑图案，形成在支撑图案的侧壁上穿透模制层的存储节点电极，并且其中存储节点电极由支撑模式支撑 。 该方法还包括去除模制层，在存储节点电极上形成电介质层，并在电介质层上形成平板电极。

公开(公告)号：US20120169715A1

公开(公告)日：2012-07-05

申请号：US13075870

申请日：2011-03-30

Applicant: Jun Yong NOH ,  Hui Cheol Hwang ,  Kye Hyun Kim

Inventor： Jun Yong NOH ,  Hui Cheol Hwang ,  Kye Hyun Kim

IPC: G06T15/00

CPC classification number: G06T17/05 ,  G06T17/205

Abstract: Disclosed herein are a stereoscopic image generation method of background terrain scenes, a system using the same, and a recording medium for the same. The stereoscopic image generation method of background terrain scenes includes an initial mesh creation step of creating an initial mesh using terrain geometry based on image sequences, a geometry error correction step of generating a projection map, detecting error regions of the initial mesh using the generated projection map, generating a vector map of the detected error regions, and generating a corrected mesh, error of which is corrected, and a stereo conversion step of generating a stereoscopic image using the corrected mesh. Since the stereoscopic image is generated based on the mesh, the mesh fits the terrain shape even though the geometry is complex. Further, time coherence can be enforced, the mesh can be edited easily, and new elements can be unseamingly composed into the terrain. Thus, it is possible to prevent a viewer who views the stereoscopic image from becoming tired.

Abstract translation: 这里公开了背景地形场景的立体图像生成方法，使用该场景的系统及其记录介质。 背景地形场景的立体图像生成方法包括：基于图像序列的地形几何生成初始网格的初始网格划分步骤，生成投影图的几何误差校正步骤，使用所生成的投影来检测初始网格的误差区域 映射，生成检测到的误差区域的矢量图，并且生成其校正的校正网格，以及立体声转换步骤，使用校正的网格生成立体图像。 由于基于网格生成立体图像，所以即使几何形状复杂，网格也适合于地形。 此外，可以实施时间一致性，可以容易地编辑网格，并且可以将新的元素无缝地组合到地形中。 因此，可以防止观看立体图像的观看者变得厌倦。

公开(公告)号：US20090174011A1

公开(公告)日：2009-07-09

申请号：US12314830

申请日：2008-12-17

Applicant: Sang-hyeon Jeon ,  Jun-yong Noh ,  Bong-gu Sung

Inventor： Sang-hyeon Jeon ,  Jun-yong Noh ,  Bong-gu Sung

IPC: H01L29/78

CPC classification number: H01L23/585 ,  H01L29/4236 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes an internal circuit region on a semiconductor substrate, at least one guard ring on the semiconductor substrate, the guard ring surrounding the internal circuit region, and at least one current blocking unit on the semiconductor substrate, the current blocking unit being configured to block an electric current flowing from the guard ring to the semiconductor substrate.

Abstract translation: 半导体器件包括半导体衬底上的内部电路区域，半导体衬底上的至少一个保护环，围绕内部电路区域的保护环以及半导体衬底上的至少一个电流阻挡单元，电流阻挡单元被配置 以阻挡从保护环流到半导体衬底的电流。

公开(公告)号：US06417097B1

公开(公告)日：2002-07-09

申请号：US09754266

申请日：2001-01-05

Applicant: Min-Wk Hwang ,  Jun-Yong Noh

Inventor： Min-Wk Hwang ,  Jun-Yong Noh

IPC: H01L214763

CPC classification number: H01L21/76897 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76888 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10888

Abstract: A method of forming a contact structure in a semiconductor device includes forming an interlayer insulating layer containing impurities on a semiconductor substrate. The interlayer insulating layer is patterned to form a pad contact hole. The pad contact hole is filled with a conductive pad. Thermal oxidation annealing is then carried out to form an oxide layer on a top surface of the conductive pad and at an interface between the conductive pad and the interlayer insulating layer.

Abstract translation: 在半导体器件中形成接触结构的方法包括在半导体衬底上形成含有杂质的层间绝缘层。 对层间绝缘层进行图案化以形成焊盘接触孔。 焊盘接触孔填充有导电焊盘。 然后进行热氧化退火以在导电焊盘的顶表面和导电焊盘与层间绝缘层之间的界面处形成氧化物层。

公开(公告)号：US20070037406A1

公开(公告)日：2007-02-15

申请号：US11424498

申请日：2006-06-15

Applicant: Joo-Sung PARK ,  Jun-Yong NOH

Inventor： Joo-Sung PARK ,  Jun-Yong NOH

IPC: H01L21/31 ,  H01L21/469

CPC classification number: H01L21/02118 ,  H01L21/022 ,  H01L21/312 ,  H01L21/76802 ,  H01L23/3192 ,  H01L23/556 ,  H01L24/05 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/48463 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/05042 ,  H01L2924/12036 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19041 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A method of fabricating a semiconductor device includes forming a photo-sensitive polyimide layer on a semiconductor substrate, patterning the photo-sensitive polyimide layer using a mask having a layer for adjusting light transmittance, and forming an epoxy molding compound on the substrate having the photo-sensitive polyimide layer patterns.

Abstract translation: 制造半导体器件的方法包括在半导体衬底上形成光敏聚酰亚胺层，使用具有用于调节透光率的层的掩模对感光聚酰亚胺层进行构图，并在具有照片的衬底上形成环氧树脂模塑料 敏感的聚酰亚胺层图案。

公开(公告)号：US06335285B1

公开(公告)日：2002-01-01

申请号：US09260804

申请日：1999-03-02

Applicant: Kwang-youl Chun ,  Jun-yong Noh ,  Yoon-jae Lee

Inventor： Kwang-youl Chun ,  Jun-yong Noh ,  Yoon-jae Lee

IPC: H01L21461

CPC classification number: H01L21/76819 ,  H01L21/31053 ,  H01L21/823475

Abstract: There is provided a method for manufacturing a semiconductor device which can provide global planarization between a cell array region and a periphery region by a simple process. An interlevel dielectric layer is formed over the entire surface of a semiconductor substrate where a global step difference exists between a cell array region and a periphery region. A first material layer serving as a stopper is formed on the interlevel dielectric layer. A contact hole partially exposing the semiconductor substrate of the cell array region is formed by patterning the first material layer and the interlevel dielectric layer. A conductive layer is formed over the entire surface of the semiconductor substrate where the contact hole is formed. Global planarization is provided between the cell array region and the periphery region by performing a chemical mechanical polishing (CMP) process on the semiconductor substrate where the conductive layer is formed.

Abstract translation: 提供了一种制造半导体器件的方法，其可以通过简单的工艺在单元阵列区域和外围区域之间提供全局平坦化。 在半导体衬底的整个表面上形成层间电介质层，其中在单元阵列区域和周边区域之间存在全局阶跃差。 用作阻挡层的第一材料层形成在层间电介质层上。 通过图案化第一材料层和层间电介质层来形成部分地暴露电池阵列区域的半导体衬底的接触孔。 在形成有接触孔的半导体基板的整个表面上形成导电层。 通过在形成导电层的半导体衬底上进行化学机械抛光（CMP）工艺，在单元阵列区域和外围区域之间提供全局平坦化。

公开(公告)号：US5990510A

公开(公告)日：1999-11-23

申请号：US212053

申请日：1998-12-15

Applicant: Jin-Gyoo Choi ,  Jun-Yong Noh

Inventor： Jin-Gyoo Choi ,  Jun-Yong Noh

IPC: H01L21/8242 ,  H01L27/108 ,  H01L29/76

CPC classification number: H01L27/10852 ,  H01L27/10894 ,  H01L27/10814

Abstract: A semiconductor memory device with a capacitor-over-bitline (COB) structure and a method for fabricating the same. The semiconductor memory device includes a transistor having a gate electrode formed on a gate insulating layer on a semiconductor substrate and having source and drain regions formed on the surface of the substrate and separated from each other by the gate electrode, a first interlayer insulating layer formed over the substrate including the transistor; a bitline formed over the first interlayer insulating layer; and a second interlayer insulating layer formed over the substrate including the bitline, for insulating the bitline from a storage node of a capacitor. A surface of the second interlayer insulating layer is planarized by a chemical-mechanical polishing (CMP) process so as to be substantially parallel to a surface of the substrate including the bitline.

Abstract translation: 一种具有电容器 - 位线（COB）结构的半导体存储器件及其制造方法。 半导体存储器件包括晶体管，其晶体管具有形成在半导体衬底上的栅极绝缘层上并具有源极和漏极区的栅电极，该栅极和漏极区形成在衬底的表面上并被栅电极彼此分离，形成第一层间绝缘层 在包括晶体管的衬底上; 在所述第一层间绝缘层上形成的位线; 以及形成在包括所述位线的所述基板的上方的用于使所述位线与电容器的存储节点绝缘的第二层间绝缘层。 通过化学机械抛光（CMP）工艺将第二层间绝缘层的表面平坦化，以便基本平行于包括位线的衬底的表面。

公开(公告)号：US20120139060A1

公开(公告)日：2012-06-07

申请号：US13370819

申请日：2012-02-10

Applicant: Sang-hyeon JEON ,  Jun-yong NOH ,  Bong-gu SUNG

Inventor： Sang-hyeon JEON ,  Jun-yong NOH ,  Bong-gu SUNG

IPC: H01L29/78

CPC classification number: H01L23/585 ,  H01L29/4236 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes an internal circuit region on a semiconductor substrate, at least one guard ring on the semiconductor substrate, the guard ring surrounding the internal circuit region, and at least one current blocking unit on the semiconductor substrate, the current blocking unit being configured to block an electric current flowing from the guard ring to the semiconductor substrate.

Abstract translation: 半导体器件包括半导体衬底上的内部电路区域，半导体衬底上的至少一个保护环，围绕内部电路区域的保护环以及半导体衬底上的至少一个电流阻挡单元，电流阻挡单元被配置 以阻挡从保护环流到半导体衬底的电流。