公开(公告)号：US4562573A

公开(公告)日：1985-12-31

申请号：US533968

申请日：1983-09-20

申请人： Kazuo Murano ,  Tetsuo Soejima ,  Shigeo Amemiya

发明人： Kazuo Murano ,  Tetsuo Soejima ,  Shigeo Amemiya

IPC分类号： H04J3/08 ,  H04L12/40 ,  H04M9/02 ,  H04Q11/04 ,  H04J3/02 ,  H04J3/06

CPC分类号： H04L12/40032 ,  H04L12/40 ,  H04M9/025 ,  H04Q11/0428

摘要： An information communication system having a plurality of terminal equipment units, a network termination unit, a receive (R) line, and transmit (T) line. The terminal equipment units are commonly connected to the R and T line so as to communicate with the network termination unit. The communication is achieved in the form of successive frame signals, each composed of at least successive channels. Each terminal equipment determines a delay time for channel insertion into the frame signal on the T line. the delay time is determined during a learning identification algorithm operation which takes the transmission delay time along the R and T lines into consideration.

摘要翻译： 一种具有多个终端设备单元，网络终端单元，接收线路和发送（T）线路的信息通信系统。 终端设备单元通常连接到R和T线，以便与网络终端单元通信。 通信以连续帧信号的形式实现，每个信号由至少连续的信道组成。 每个终端设备确定通道插入T线上的帧信号的延迟时间。 在学习识别算法操作期间确定延迟时间，其考虑沿着R和T线的传输延迟时间。

公开(公告)号：US4363977A

公开(公告)日：1982-12-14

申请号：US236609

申请日：1981-02-20

申请人： Toshitaka Tsuda ,  Kazuo Murano ,  Kazuo Yamaguchi ,  Takafumi Chujo ,  Norio Murakami ,  Motohide Takahashi

发明人： Toshitaka Tsuda ,  Kazuo Murano ,  Kazuo Yamaguchi ,  Takafumi Chujo ,  Norio Murakami ,  Motohide Takahashi

IPC分类号： G01R19/00 ,  H03K5/24 ,  H04B10/69 ,  H04L25/06 ,  H03K5/153 ,  H03K5/01

CPC分类号： H04B10/695 ,  G01R19/0038 ,  H03K5/2427 ,  H04B10/6911 ,  H04L25/062 ,  H04L25/065

摘要： A device for discriminating between two values of a signal using DC offset compensation including an automatic gain control circuit, a peak detector circuit and a feedback path from the peak detector circuit to the input circuit of the automatic gain control circuit. The value of the feedback current is regulated so that the maximum value of one of the same polarity signals and the opposite polarity signal coincides with the minimum value of the other of the two signals.

摘要翻译： 用于使用包括自动增益控制电路，峰值检测器电路和从峰值检测器电路到自动增益控制电路的输入电路的反馈路径的DC偏移补偿来鉴别信号的两个值的装置。 调节反馈电流的值，使得相同极性信号和相反极性信号之一的最大值与两个信号中另一个的最小值一致。

公开(公告)号：US3967058A

公开(公告)日：1976-06-29

申请号：US522693

申请日：1974-11-11

申请人： Takao Moriya ,  Kazuo Murano ,  Syunji Fujikawa

发明人： Takao Moriya ,  Kazuo Murano ,  Syunji Fujikawa

IPC分类号： H04B1/56 ,  H04J3/00 ,  H04L5/14 ,  H04L5/22 ,  H04L7/00

CPC分类号： H04L5/1476

摘要： The system according to the present invention carries out two way communication of a digital signal between a master terminal having its own clock source and a slave terminal, which is synchronized with the clock of the master terminal. The master terminal sends a digital signal originating from its own clock to the slave terminal and the slave terminal in turn sends a digital signal based on a clock signal which is derived from the received digital pulse from the master terminal.

摘要翻译： 根据本发明的系统在具有其自己的时钟源的主终端和与主终端的时钟同步的从终端之间执行数字信号的双向通信。 主终端将从其自己的时钟发出的数字信号发送到从终端，从属终端依次从主终端从接收到的数字脉冲导出的时钟信号发送数字信号。