Adaptive equalizer and receiver
    11.
    发明授权
    Adaptive equalizer and receiver 失效
    自适应均衡器和接收器

    公开(公告)号:US5475710A

    公开(公告)日:1995-12-12

    申请号:US998517

    申请日:1992-12-29

    摘要: A receiver capable of effecting frame synchronization control even at the time of initial acquisition and hand off in the presence of frequency selective fading. The receiver is provided in a demodulator part thereof with a quasi-coherent detector (140), a memory (144) for temporarily storing the output of the quasi-coherent detector, a write address counter (145) for the memory, an incoherent correlator (146) that determines correlation between a received data pattern and a known UW data pattern, a UW tentative detection circuit (147) that is supplied with the output of the address counter and the output of the incoherent correlator, an adaptive equalizer (148) that equalizes the received data stored in the memory by using the output of the UW tentative detection circuit, a UW detector (103) that effects UW position detection on the basis of the equalized data, and a frame synchronization control circuit (150) that effects frame synchronization control on the basis of the output of the UW tentative detection circuit and the output of the UW detector.

    摘要翻译: 即使在频率选择性衰落存在的情况下,即使在初始采集时也能执行帧同步控制的接收机。 接收机在其解调器部分中提供准相干检测器(140),用于临时存储准相干检测器的输出的存储器(144),用于存储器的写地址计数器(145),非相干相关器 (146),其确定接收的数据模式与已知UW数据模式之间的相关性;被提供有地址计数器的输出和非相干相关器的输出的UW临时检测电路(147),自适应均衡器(148) 通过使用UW临时检测电路的输出,通过基于均衡数据实现UW位置检测的UW检测器(103)来均衡存储在存储器中的接收数据;以及帧同步控制电路(150),其实现 基于UW临时检测电路的输出和UW检测器的输出进行帧同步控制。

    Demodulator, clock recovery circuit, demodulation method and clock recovery method
    12.
    发明授权
    Demodulator, clock recovery circuit, demodulation method and clock recovery method 失效
    解调器,时钟恢复电路,解调方法和时钟恢复方法

    公开(公告)号:US06891906B1

    公开(公告)日:2005-05-10

    申请号:US09150011

    申请日:1998-09-09

    CPC分类号: H03M5/12

    摘要: A demodulator is constituted by: a clock recovery circuit for generating a recovered clock from the series of received data and outputting the recovered clock; a state estimation circuit for making an estimation about a reception state such as waveform distortion or the like from the series of received data, and outputting waveform information based on the result of the estimation; and a correlator for correcting a reference and/or sample points on the basis of the recovered clock and the waveform information, obtaining a correlation value between the series of received data and the reference from a plurality of the sample points, and outputting demodulated data on the basis of the correlation value.

    摘要翻译: 解调器由以下部件构成:时钟恢复电路,用于从所述一系列接收数据产生恢复的时钟并输出恢复时钟; 状态估计电路,用于从所述一系列接收数据中对诸如波形失真等的接收状态进行估计,并且基于所述估计结果来输出波形信息; 以及相关器,用于基于恢复的时钟和波形信息来校正参考和/或采样点,从多个采样点获得所接收的数据序列与参考之间的相关值,并且输出解调数据 相关值的基础。

    Equalizer
    13.
    发明授权
    Equalizer 失效
    均衡器

    公开(公告)号:US5175747A

    公开(公告)日:1992-12-29

    申请号:US730675

    申请日:1991-07-16

    申请人: Keishi Murakami

    发明人: Keishi Murakami

    IPC分类号: H04L25/03

    CPC分类号: H04L25/03057

    摘要: An adaptive equalizer comprising a computing unit which receives a known signal sequence to estimate transmission channel characteristics and effect compensatory control of tap coefficients by use of a first algorithm that has fast convergence property, and a tap coefficient computing unit for making compensation for relatively slow changes in a random data input after the compensation for the transmission channel characteristics, which either employs an algorithm that involves a relatively low computational complexity or intermittently executes computation which contains an interpolation of consecutive sets of tap coefficients between intermittent intervals.

    摘要翻译: 一种自适应均衡器,包括计算单元,其接收已知信号序列以估计传输信道特性,并通过使用具有快速收敛特性的第一算法来实现抽头系数的补偿控制;以及抽头系数计算单元,用于对相对缓慢的变化进行补偿 在补偿传输信道特性之后的随机数据输入中,其采用涉及相对低的计算复杂度的算法或间歇地执行包含间歇间隔之间的连续抽头系数组的插值的计算。