公开(公告)号：US20190313090A1

公开(公告)日：2019-10-10

申请号：US16140748

申请日：2018-09-25

申请人： MStar Semiconductor, Inc.

发明人： Cheng-Yu HSIEH ,  Chung-Yu CHANG

IPC分类号： H04N19/105 ,  H04N19/159 ,  H04N19/182

摘要： An intra prediction mode determining device includes: an intra prediction circuit, generating, according to a plurality of prediction modes, a plurality of sets of predicted pixel values of a target prediction unit by using a set of original pixel values of a neighbor prediction unit as a set of adjacent pixel values; a residual calculating circuit, calculating a plurality of residuals based on a set of the original pixel values and the plurality of sets of predicted pixel values of the target prediction unit; and a mode selecting circuit, selecting from the plurality of prediction modes one prediction mode as a candidate mode according to the plurality of sets of residuals.

公开(公告)号：US20190289300A1

公开(公告)日：2019-09-19

申请号：US16141185

申请日：2018-09-25

申请人： MStar Semiconductor, Inc.

发明人： Yi-Chin HUANG ,  Yi-Shin TUNG

IPC分类号： H04N19/172 ,  H04N19/176 ,  H04N19/152

摘要： A method for compressing an image frame. Display data of a plurality of image blocks in the image frame is transmitted in a raster san order to a post-processing circuit. Upon receiving the display data of one image block, the post-processing circuit reads intermediate data of a buffering image block corresponding to the image block from a buffer memory, performs post-processing on the intermediate data of the buffering image block and display data of a main sub-block in the image block according to the display data of the image block and the intermediate data of the buffering image block to generate post-processed data of a post-processed image block, and stores the intermediate data of an intermediate image block in the image block to the buffer memory. A compressor compresses the post-processed data of the post-processed image block into compression data of the post-processed image block.

公开(公告)号：US10388007B2

公开(公告)日：2019-08-20

申请号：US15641645

申请日：2017-07-05

申请人： MStar Semiconductor, Inc.

发明人： Hao-Teng Fan ,  Chiao Su

IPC分类号： G06K9/36 ,  G06T5/50 ,  G06T3/60

摘要： An image processing method includes: performing an equirectangular projection on a first fisheye image and a second fisheye image to obtain a first equirectangular image and a second equirectangular image; swapping positions of a left-half image of the second equirectangular image and a right-half image of the second equirectangular image to obtain a third equirectangular image; rotating the first equirectangular image and the third equirectangular image by 90 degrees in a spherical coordinate system to obtain a first rotated image and a second rotated image; stitching the first rotated image and the second rotated image to obtain a stitched image; and rotating the stitched image by −90 degrees in the spherical coordinate system to obtain a panoramic image.

公开(公告)号：US20190205506A1

公开(公告)日：2019-07-04

申请号：US16184119

申请日：2018-11-08

申请人： MStar Semiconductor, Inc.

发明人： LIJING CHEN

IPC分类号： G06F21/12 ,  H04L29/08 ,  H04N21/6334 ,  H04N21/4223 ,  H04N21/41

CPC分类号： G06F21/121 ,  G06F2221/0773 ,  H04L67/34 ,  H04N21/4108 ,  H04N21/4223 ,  H04N21/63345

摘要： A method and system for authorizing software in an electronic device is provided. The electronic device has a unique identifier (UID) and is connected to a server of the software through a terminal device. The method includes: generating and transmitting at least one section of audio/video data embedded with the UID corresponding to the electronic device to the terminal device; uploading the audio/video data through the terminal device and sending an authorization request to the server of the software; returning authorization audio/video data from the server of the software through the terminal device, wherein the authorization audio/video data includes an authorization key corresponding to the electronic device; and enabling the electronic device to obtain the authorization audio/video data by means of audio/video communication, so as to obtain the authorization key and authorize the software in the electronic device.

公开(公告)号：US20190181100A1

公开(公告)日：2019-06-13

申请号：US16040862

申请日：2018-07-20

申请人： MStar Semiconductor, Inc.

发明人： You-Wei LIN

IPC分类号： H01L23/00 ,  H01L23/31

摘要： A chip package structure includes a substrate, a die, a plurality of warpage retainers, and an encapsulant. The substrate has a surface, on which the die is provided. The warpage retainers are provided at at least one corner of the substrate. The encapsulant covers the surface of the substrate, the die and the warpage retainers.

公开(公告)号：US20190149363A1

公开(公告)日：2019-05-16

申请号：US15969961

申请日：2018-05-03

申请人： MStar Semiconductor, Inc.

发明人： Tzu-Yi Yang ,  Ko-Yin Lai ,  Tai-Lai Tung

IPC分类号： H04L25/02 ,  H04J11/00

摘要： A channel estimation circuit includes a pilot buffer, an interference indication buffer and a channel information calculation circuit. The pilot buffer stores channel information of multiple pilot cells in multiple symbols. The interference indication buffer stores interference indication information, which indicates whether the multiple symbols are affected by interference. The channel information calculation circuit, coupled to the pilot buffer and the interference indication buffer, estimates, based on channel information of a part of the multiple pilot cells in the multiple symbols, channel information of a data cell in the multiple symbols according to the interference indication information. The part of the multiple pilot cells do not include pilot cells of any symbol affected by interference.

公开(公告)号：US20190097655A1

公开(公告)日：2019-03-28

申请号：US15909171

申请日：2018-03-01

申请人： MStar Semiconductor, Inc.

发明人： Yu-Hsien KU

IPC分类号： H03M13/11 ,  H03M13/00

摘要： A low-density parity-check (LDPC) code decoding method for decoding a set of initial log likelihood ratio (LLR) outputted by a de-mapping circuit. The decoding method comprises: receiving and storing the set of initial LLR from the de-mapping circuit; receiving and storing the set of initial LLR from a first buffer; receiving the set of initial LLR from a second buffer; performing a decoding operation according to the set of initial LLR to generate a set of intermediate LLR; determining whether the set of intermediate LLR is converged; when the set of intermediate LLR is not converged, storing the set of intermediate LLR back into the second buffer, wherein a storage space of the second buffer is greater than that of the first buffer; and when the set of intermediate LLR is converged, outputting the set of intermediate LLR as a set of decoded LLR.

公开(公告)号：US20190074856A1

公开(公告)日：2019-03-07

申请号：US15909116

申请日：2018-03-01

申请人： MStar Semiconductor, Inc.

发明人： Ting-Nan CHO ,  Kai-Wen CHENG ,  Tai-Lai TUNG

IPC分类号： H04B1/10 ,  H04B1/12 ,  H04L25/02

摘要： A symbol rate estimating device includes: a power spectrum density (PSD) estimating unit, estimating a PSD of an input signal; an index searching unit, searching for a cut-off frequency index in the PSD; an adjacent channel interference (ACI) detecting unit, detecting whether the input signal has ACI to generate a detection signal; a threshold adjusting unit, generating an adjusted index number threshold according to the detection signal; an index output unit, outputting the cut-off frequency index according to the adjusted index number threshold; and a symbol calculating unit, calculating a symbol rate of the input signal according to the cut-off frequency index.

公开(公告)号：US20180375531A1

公开(公告)日：2018-12-27

申请号：US15691857

申请日：2017-08-31

申请人： MStar Semiconductor, Inc.

发明人： Yu Hsien KU

IPC分类号： H03M13/11 ,  H03M13/00

摘要： A decoding method for quasi-cyclic low-density parity-check codes is applied to a check matrix and multiple sets of transmission data. The check matrix includes N sub-matrices. The decoding method uses w (w

公开(公告)号：US10164671B2

公开(公告)日：2018-12-25

申请号：US15368885

申请日：2016-12-05

申请人： MStar Semiconductor, Inc.

发明人： Chia-Wei Chen ,  Kai-Wen Cheng ,  Ko-Yin Lai ,  Tai-Lai Tung

IPC分类号： H04B1/00 ,  H04B1/10 ,  H04B1/16

摘要： An echo cancellation circuit is provided to reduce or eliminate the effects of a pre-echo signal that is part of a received multi-path signal. The circuit includes: a delay module, receiving an input signal and delaying the input signal to generate a plurality of delayed signals; a multiplication module, multiplying the plurality of delayed signals by a plurality of coefficients to generate a plurality of multiplication results, respectively; a summing circuit, performing a summation on the plurality of multiplication results to generate a summation signal; a subtraction circuit, receiving a first delay signal and generating a subtracted signal according to the first delayed signal and the summation signal; and a coefficient calculating circuit, calculating the plurality of coefficients according to the subtracted signal. The echo cancellation circuit outputs an output signal as the subtracted signal, with the pre-echo signal diminished or eliminated.