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    High-Speed Performance Electrical Connector for Modular Electronics Systems
    11.
    发明申请
    High-Speed Performance Electrical Connector for Modular Electronics Systems 有权

    公开(公告)号：US20220061181A1

    公开(公告)日：2022-02-24

    申请号：US17408312

    申请日：2021-08-20

    Applicant: NATIONAL INSTRUMENTS CORPORATION

    Inventor： Richard G. Baldwin, Jr. ,  Dennis Vance Toth

    IPC: H05K7/14 ,  G06F1/18 ,  H01R12/70

    Abstract: A connector gap between a module connector mating surface and the backplane connector of a chassis may be eliminated through a mechanism that forcefully pushes (or pulls) the module towards the backplane and/or forcefully pushes (or pulls) the backplane toward the module. A spring-loaded or resilient element may be used to fasten the module in a way that effectively fills any designed-in and tolerance-induced gap in the connector interface, allowing the connector to fully seat. In addition, a gasket or other compressible member may be included at the connector mating interface. The gap in the connector interface may be reduced by introducing adjustable card cage members that are capable of being set during the assembly or manufacturing process using special alignment fixtures. The gap in the connector interface may also be reduced by introducing a higher tolerance capable manufacturing process, such as machining, to the card cage sub-assembly.

    LLC power supply current-sharing and frequency locking mechanism
    12.
    发明授权
    LLC power supply current-sharing and frequency locking mechanism 有权

    公开(公告)号：US11211869B2

    公开(公告)日：2021-12-28

    申请号：US15923438

    申请日：2018-03-16

    Applicant: NATIONAL INSTRUMENTS CORPORATION

    Inventor： John G. Banaska ,  Chin-Hong Cheah

    IPC: H02J1/00 ,  H02J3/00 ,  H02M3/28 ,  H02M1/00 ,  H02J1/10 ,  H02M3/335

    Abstract: A multiphase current-sharing configuration may include at least two power supplies providing respective output-currents in the current-sharing configuration. One or more of the power supplies may itself be a multiphase power supply. A first power supply of the current-sharing configuration may detect a phase difference between an external control signal provided to the first power supply to control the output voltage of the first power supply, and an internal control signal provided by a VCO of the first power supply. The phase difference may be provided to an integrator to cause the internal control signal to track the external control signal when the external control signal is available, and maintain a present operating frequency of the internal control signal in case the external control signal is lost, in which case the internal control signal may be used to uninterruptedly control the output voltage of the first power supply.

    SWITCH PRUNING IN A SWITCH FABRIC BUS CHASSIS
    15.
    发明申请
    SWITCH PRUNING IN A SWITCH FABRIC BUS CHASSIS 有权

    公开(公告)号：US20210248100A1

    公开(公告)日：2021-08-12

    申请号：US17241394

    申请日：2021-04-27

    Applicant: NATIONAL INSTRUMENTS CORPORATION

    Inventor： Eric L. Singer ,  Jason W. Frels ,  Jonathan W. Hearn

    IPC: G06F13/40

    Abstract: Bus enumeration of a switch fabric bus may be performed without assigning bus numbers to unused switch ports and/or corresponding slots to which the unused switch ports are routed. Accordingly, switches coupled to a switch fabric bus in a chassis may link-train with corresponding slots in the chassis in an attempt to establish active connections with devices coupled to the slots. Unused switch fabric bus lanes running from the switches to unused slots may be identified, and the unused switch ports corresponding to the unused switch fabric bus lanes may be disabled. During a subsequent bus enumeration procedure for the switch fabric bus, bus numbers may be allocated to the identified used switch ports (or corresponding used slots) but not to the identified unused switch ports (or corresponding unused slots). The link training, used/unused switch port identification, and bus enumeration may all be performed each time the chassis is reset.

    Massive MIMO architecture
    17.
    发明授权
    Massive MIMO architecture 有权

    公开(公告)号：US10855346B2

    公开(公告)日：2020-12-01

    申请号：US14703214

    申请日：2015-05-04

    Applicant: NATIONAL INSTRUMENTS CORPORATION

    Inventor： Ian C. Wong ,  Karl F. Nieman ,  Nikhil U. Kundargi

    IPC: H04L7/00 ,  H04B7/0413 ,  H04B7/0456 ,  H04B7/024 ,  H04L5/00 ,  H04W56/00 ,  H04B7/0452 ,  H04W88/08

    Abstract: Techniques are disclosed relating to a massive MIMO base station architecture. In some embodiments, a base station is configured to combine signals received by multiple antennas and, for at least a subset of processing elements included in the base station, each processing element is configured to operate on a different portion of the combined signals. In these embodiments, each portion includes signals from multiple antennas. In some embodiments, the portions are different time and/or frequency portions of the combined signals. In some embodiments, this distributed processing may allow the number of antennas of the base station to scale dramatically, provide dynamic re-configurability, facilitate real-time reciprocity-based precoding, etc.

    Channel sounding techniques
    19.
    发明授权
    Channel sounding techniques 有权

    公开(公告)号：US10708086B2

    公开(公告)日：2020-07-07

    申请号：US15409261

    申请日：2017-01-18

    Applicant: NATIONAL INSTRUMENTS CORPORATION

    Inventor： Malik Muhammad Usman Gul ,  Ahsan Aziz ,  James Wesley McCoy

    IPC: H04L25/02 ,  H04W56/00 ,  H04J13/00 ,  H04L25/03

    Abstract: Techniques are disclosed relating to channel sounding. In some embodiments a transmitter transmits a periodic CAZAC sequence beginning at a point in time that corresponds to a timing signal (e.g., a pulse-per-second signal). In some embodiments, a receiver waits to begin processing received sequences for a time interval corresponding to the length of the CAZAC sequence, where the time interval begins at the same time as the timing signal. This may avoid a need for timing synchronization prior to processing, reduce processing and latency in receiver implementations, and may allow determination of a TOA as well as a channel impulse response estimate by correlating a received cyclically-shifted CAZAC sequence with a local version of the transmitted CAZAC sequence.

    UE-AIDED CHANNEL RECIPROCITY COMPENSATION FOR RADIO ACCESS IN MIMO WIRELESS COMMUNICATION SYSTEMS
    20.
    发明申请
    UE-AIDED CHANNEL RECIPROCITY COMPENSATION FOR RADIO ACCESS IN MIMO WIRELESS COMMUNICATION SYSTEMS 审中-公开

    公开(公告)号：US20190280741A1

    公开(公告)日：2019-09-12

    申请号：US16392039

    申请日：2019-04-23

    Applicant: National Instruments Corporation

    Inventor： Nikhil U. Kundargi ,  Karl F. Nieman ,  Junmo Sung

    IPC: H04B7/0413 ,  H04L5/00 ,  H04W72/04 ,  H04W72/08 ,  H04L25/02 ,  H04B17/11 ,  H04B17/14 ,  H04L27/26

    Abstract: A wireless cellular base station (BS) transmitter transmits a downlink calibration pilot symbol. A receiver receives from a user equipment (UE) an uplink calibration pilot symbol and an effective downlink channel estimate transmitted by the UE. The effective downlink channel estimate is computed by the UE using the downlink calibration pilot symbol received from the BS. Processing devices compute an effective uplink channel estimate using the uplink calibration pilot symbol received from the UE and compute channel reciprocity calibration coefficients using the effective downlink channel estimate received from the UE and the effective uplink channel estimate computed by the BS. The BS includes multiple antennas, and the BS computes the channel reciprocity calibration coefficients for each antenna. Alternatively, the uplink channel estimate received by the BS is an inverted version of the effective downlink channel estimate, which the processing devices use for channel reciprocity compensation.

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