Charge pump output device with leakage cancellation
    11.
    发明申请
    Charge pump output device with leakage cancellation 有权
    带有泄漏消除的电荷泵输出装置

    公开(公告)号:US20060055450A1

    公开(公告)日:2006-03-16

    申请号:US10940197

    申请日:2004-09-13

    申请人: Richard Gu

    发明人: Richard Gu

    IPC分类号: G05F1/10

    CPC分类号: H02M3/07

    摘要: The charge pump circuit includes: a charge pump output branch; a current leakage device coupled to the output branch; and a feedback device coupled between the output branch and a control node of the current leakage device such that the leakage device cancels leakage current from the output branch.

    摘要翻译: 电荷泵电路包括:电荷泵输出分支; 耦合到所述输出分支的电流泄漏装置; 以及耦合在所述电流泄漏装置的输出支路和控制节点之间的反馈装置,使得所述泄漏装置抵消来自所述输出支路的泄漏电流。

    Artificial intelligence enabled adaptive digital beam

    公开(公告)号:US20190033439A1

    公开(公告)日:2019-01-31

    申请号:US15661339

    申请日:2017-07-27

    IPC分类号: G01S13/00 G01S13/08 G01S13/93

    摘要: The present invention includes an artificial intelligence system for acquiring real-time positioning and geographic data and generates a control signal received by a digital beam forming and steering system for adaptive detection, ranging, and tracking of moving objects for example vehicles. This system is particularly effective in detecting and tracking moving vehicles, obstacles and pedestrians on curved roads and blind spots behind corners of roads.

    LATCH DIVIDER
    13.
    发明申请

    公开(公告)号:US20120206175A1

    公开(公告)日:2012-08-16

    申请号:US13028003

    申请日:2011-02-15

    IPC分类号: H03B19/03 H03L9/00

    CPC分类号: H03B19/14

    摘要: There are numerous types of dividers that have been employed at various frequency ranges. For many very high frequency ranges (i.e., above 30 GHz), dividers in CMOS have been developed. However, many of these designs use multiple stages. Here, however, a single stage divider has been provided that is adapted to operate at very high frequencies (i.e., 120 GHz). To accomplish this, it uses parasitic capacitances in conjunction with inductor(s) to form an LC tanks so as to take advantages of parasitics that normal degrade performance.

    摘要翻译: 在各种频率范围内使用了多种类型的分频器。 对于许多非常高的频率范围(即,高于30GHz),已经开发了CMOS中的分频器。 然而,许多这些设计使用多个阶段。 然而,这里提供了适用于在非常高的频率(即120GHz)下工作的单级分频器。 为了实现这一点,它使用寄生电容与电感器一起形成LC箱,以便利用正常退化性能的寄生效应。

    LOW-NOISE AMPLIFIER
    14.
    发明申请
    LOW-NOISE AMPLIFIER 有权
    低噪声放大器

    公开(公告)号:US20120146724A1

    公开(公告)日:2012-06-14

    申请号:US12966761

    申请日:2010-12-13

    IPC分类号: H03F3/45

    摘要: Traditionally, low-noise amplifiers or LNAs have been used in high frequency applications, but for very high frequency ranges (i.e., 60 GHz), building an LNA to meet performance needs has been difficult. Here, however, an LNA has been provided that operates well around 60 GHz. In particularly, this LNA is generally unconditionally stable, has a generally low noise factor or NF, and has a generally high gain around 60 GHz.

    摘要翻译: 传统上,在高频应用中已经使用低噪声放大器或LNA,但是对于非常高的频率范围(即60GHz),建立LNA以满足性能需求是困难的。 然而,在这里,已经提供了在60GHz左右运行的LNA。 特别地,该LNA通常是无条件稳定的,具有通常低的噪声因子或NF,并且在60GHz附近具有通常较高的增益。

    Rail-to-rail charge pump with replica circuitry

    公开(公告)号:US20060055451A1

    公开(公告)日:2006-03-16

    申请号:US10940375

    申请日:2004-09-14

    申请人: Richard Gu

    发明人: Richard Gu

    IPC分类号: G05F1/10

    CPC分类号: H02M3/07

    摘要: The charge pump circuit includes: a charge pump output branch having a first transistor and a second transistor coupled in series; an output branch replica having a third transistor and a fourth transistor coupled in series; a feedback circuit coupled between the output branch and the output branch replica; a charge pump input circuit coupled to the charge pump output branch, and having first and second input branches; and an input circuit branch replica controlled by the feedback circuit and coupled to the charge pump input circuit.

    Cross coupled voltage controlled oscillator
    16.
    发明申请
    Cross coupled voltage controlled oscillator 有权
    交叉耦合压控振荡器

    公开(公告)号:US20050237122A1

    公开(公告)日:2005-10-27

    申请号:US10828676

    申请日:2004-04-21

    申请人: Richard Gu

    发明人: Richard Gu

    CPC分类号: H03K3/0322 H03K3/0315

    摘要: An oscillator circuit comprises a plurality of ring oscillators wherein each ring oscillator produces an oscillatory output signal. The ring oscillators are cross-coupled such that each ring oscillator drives only one other ring oscillator. In at least one embodiment, the oscillator circuit comprises four, three-stage ring oscillators. As such, each ring oscillator comprising three cells (e.g., inverters or delay elements). Further, in this embodiment, the oscillator circuit produces a four phase clock comprising the oscillatory output signals from each of the four ring oscillators.

    摘要翻译: 振荡器电路包括多个环形振荡器,其中每个环形振荡器产生振荡输出信号。 环形振荡器交叉耦合,使得每个环形振荡器仅驱动一个其他环形振荡器。 在至少一个实施例中,振荡器电路包括四个三级环形振荡器。 这样,每个环形振荡器包括三个单元(例如,反相器或延迟元件)。 此外,在本实施例中,振荡器电路产生包括来自四个环形振荡器中的每一个的振荡输出信号的四相时钟。

    All-N-logic high-speed single-phase dynamic CMOS logic
    17.
    发明授权
    All-N-logic high-speed single-phase dynamic CMOS logic 失效
    全N逻辑高速单相动态CMOS逻辑

    公开(公告)号:US5525916A

    公开(公告)日:1996-06-11

    申请号:US419376

    申请日:1995-04-10

    IPC分类号: H03K19/096 H03K19/0948

    CPC分类号: H03K19/0963

    摘要: An All-N-Logic (ANL) high-speed single-phase dynamic CMOS logic utilizing all-N-logic blocks. According to a first embodiment, a 2:1 frequency divider is provided using the ANL CMOS logic of the present invention. According to a second embodiment, a pipelines 8-bit carry generator is provided utilizing five stacked NMOS gates.

    摘要翻译: 全N逻辑(ANL)高速单相动态CMOS逻辑,利用全N逻辑块。 根据第一实施例,使用本发明的ANL CMOS逻辑提供2:1分频器。 根据第二实施例,利用五个堆叠的NMOS门提供管线8位进位发生器。