Spatial light modulator having improved contrast ratio
    11.
    发明授权
    Spatial light modulator having improved contrast ratio 有权
    具有改善的对比度的空间光调制器

    公开(公告)号:US06038056A

    公开(公告)日:2000-03-14

    申请号:US354838

    申请日:1999-07-16

    CPC classification number: G02B26/0841

    Abstract: A spatial light modulator (70) comprised of an array of micromirrors (72) each having support post (74). The support post (74) defines support post edges (76) in the upper surface of the mirrors (72). These support post edges (76) are all oriented at 45 degree angles with respect to an incident beam of light from a light source (80) to minimize diffraction of light from the edges (76) into the darkfield optics when the mirrors are oriented in the off-state. The present invention achieves an increased contrast ratio of about 20% over conventional designs.

    Abstract translation: 由具有支撑柱(74)的微镜阵列(72)组成的空间光调制器(70)。 支撑柱(74)在反射镜(72)的上表面中限定支撑柱边缘(76)。 这些支撑柱边缘(76)都相对于来自光源(80)的入射光束以45度的角度取向,以使得当镜子被定向到时,来自边缘(76)的光的衍射最小化到暗场光学器件 关闭状态。 与常规设计相比,本发明实现了比20%提高的对比度。

    Pulse width modulation for spatial light modulator with split reset
addressing
    12.
    发明授权
    Pulse width modulation for spatial light modulator with split reset addressing 失效
    具有分离复位寻址的空间光调制器的脉宽调制

    公开(公告)号:US5497172A

    公开(公告)日:1996-03-05

    申请号:US259402

    申请日:1994-06-13

    CPC classification number: G09G3/2014 G09G3/2022 G09G3/2033 G09G3/34 G09G3/2018

    Abstract: A method of implementing pulse-width modulated image display systems (10, 20) with a spatial light modulator (SLM) (15) configured for split-reset addressing. Display frame periods are divided into time slices. Each frame of data is divided into bit-planes, each bit-plane having one bit of data for each pixel element and representing a bit weight of the intensity value to be displayed by that pixel element. Each bit-plane has a display time corresponding to a number of time slices, with bit-planes of higher bit weights being displayed for more time slices. The bit-planes are further formatted into reset groups, each reset group corresponding to a reset group of the SLM (15). The display times for reset groups of more significant bits are segmented so that the data can be displayed in segments rather than for a continuous time. During loading, segments of corresponding bit-planes are temporally aligned from one reset group to the next. The display times for less significant bits are not segmented but are temporally aligned to the extent possible without loading conflicts.

    Abstract translation: 一种用于分配复位寻址的空间光调制器(SLM)(15)实现脉冲宽度调制图像显示系统(10,20)的方法。 显示帧周期分为时间片。 每个数据帧被分成位平面,每个位平面具有每个像素元素的一位数据,并且表示要由该像素元素显示的强度值的位权重。 每个位平面具有对应于多个时间片的显示时间,其中更高位权重的位平面被显示用于更多的时间片。 位平面被进一步格式化为复位组,每个复位组对应于SLM的复位组(15)。 更高有效位的复位组的显示时间被分段,以便可以以段而不是连续显示数据。 在加载期间,相应位平面的段在时间上从一个复位组到下一个复位组。 较低有效位的显示时间不分段,但在不加载冲突的情况下在时间上对齐的程度。

    ADAPTABLE PHASE LOCK LOOP TRANSFER FUNCTION FOR DIGITAL VIDEO INTERFACE
    13.
    发明申请
    ADAPTABLE PHASE LOCK LOOP TRANSFER FUNCTION FOR DIGITAL VIDEO INTERFACE 有权
    适用于数字视频接口的相位锁定环路传输功能

    公开(公告)号:US20100158184A1

    公开(公告)日:2010-06-24

    申请号:US12714765

    申请日:2010-03-01

    CPC classification number: H03L7/107 H03L2207/06

    Abstract: A digital video interface receiver adjusts a transfer function of a phase-locked loop circuit having a programmable charge pump, a programmable phase-locked loop filter, or a programmable gain voltage controlled oscillator. The digital video interface receiver monitors and detects errors in a data stream associated with the phase-locked loop circuit. Moreover, the digital video interface receiver changes the transfer function of the phase-locked loop circuit, in response to the detected errors, by changing parameters associated with the programmable charge pump, the programmable phase-locked loop filter, or the programmable gain voltage controlled oscillator of the phase-locked loop circuit so as to change the transfer function of the phase-locked loop circuit.

    Abstract translation: 数字视频接口接收机调节具有可编程电荷泵,可编程锁相环路滤波器或可编程增益压控振荡器的锁相环电路的传递函数。 数字视频接口接收器监视和检测与锁相环电路相关联的数据流中的错误。 此外,数字视频接口接收器通过改变与可编程电荷泵,可编程锁相环路滤波器或可编程增益电压控制相关联的参数来响应于检测到的错误来改变锁相环电路的传递函数 锁相环电路的振荡器,以便改变锁相环电路的传递函数。

    Adaptable phase lock loop transfer function for digital video interface
    14.
    发明授权
    Adaptable phase lock loop transfer function for digital video interface 有权
    适用于数字视频接口的锁相环传递功能

    公开(公告)号:US07702059B2

    公开(公告)日:2010-04-20

    申请号:US11053814

    申请日:2005-02-09

    CPC classification number: H03L7/107 H03L2207/06

    Abstract: A digital video interface receiver adjusts a transfer function of a phase-locked loop circuit having a programmable charge pump, a programmable phase-locked loop filter, or a programmable gain voltage controlled oscillator. The digital video interface receiver monitors and detects errors in a data stream associated with the phase-locked loop circuit. Moreover, the digital video interface receiver changes the transfer function of the phase-locked loop circuit, in response to the detected errors, by changing parameters associated with the programmable charge pump, the programmable phase-locked loop filter, or the programmable gain voltage controlled oscillator of the phase-locked loop circuit so as to change the transfer function of the phase-locked loop circuit.

    Abstract translation: 数字视频接口接收机调节具有可编程电荷泵,可编程锁相环路滤波器或可编程增益压控振荡器的锁相环电路的传递函数。 数字视频接口接收器监视和检测与锁相环电路相关联的数据流中的错误。 此外,数字视频接口接收器通过改变与可编程电荷泵,可编程锁相环路滤波器或可编程增益电压控制相关联的参数来响应于检测到的错误来改变锁相环电路的传递函数 锁相环电路的振荡器,以便改变锁相环电路的传递函数。

    System and method of data transmission in tension members of a fiber optical system
    15.
    发明授权
    System and method of data transmission in tension members of a fiber optical system 有权
    光纤系统张力构件中数据传输的系统和方法

    公开(公告)号:US07460786B2

    公开(公告)日:2008-12-02

    申请号:US11087359

    申请日:2005-03-23

    Abstract: A system and method transmits graphic data received at varying frequencies at a fixed data rate. The frequency dependent data and associated data clock signal are received and the frequency dependent data is converted to frequency independent data. A ratio of a number of data clock cycles to a number of reference clock cycles is determined and transmitted. The frequency independent data and header data are transmitted, at a fixed rate, to a receiver, the fixed rate being a frequency greater than the frequency of the associated data clock signal. The received the frequency independent data is converted to frequency dependent data based upon the received determined ratio. The communication channel may include an optical fiber and a tension member wherein control data is transmitted along the tension member and graphic data is transmitted along the optical fiber.

    Abstract translation: 系统和方法以固定数据速率发送以变化的频率接收的图形数据。 接收与频率相关的数据和相关数据时钟信号,并将频率相关数据转换为频率无关数据。 数据时钟周期数与多个参考时钟周期的比率被确定并传输。 频率无关数据和标题数据以固定速率传输到接收机,固定速率是大于相关数据时钟信号频率的频率。 接收的频率无关数据根据接收到的确定的比率被转换为频率相关数据。 通信信道可以包括光纤和张力构件,其中控制数据沿张力构件传输,并且图形数据沿着光纤传输。

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