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公开(公告)号：US06191883B1
公开(公告)日：2001-02-20
申请号：US09470719
申请日：1999-12-23
申请人： James D. Huffman , Rodney D. Miller
发明人： James D. Huffman , Rodney D. Miller
IPC分类号： G02B2600
CPC分类号： G09G3/346 , G02B26/0841 , G09G2300/0842 , G09G2300/0857 , G11C11/41
摘要： An improved memory cell (300) for use in applications, such as micromirror arrays, in which little space is available and a slow read-back cycle is tolerated. The memory (300) comprises a first input/output node (314) connected to the input of a first inverter and to the output of a second inverter. The first inverter is comprised of two transistors (304, 306) and drives a signal to a second input/output node (316). The input of the second inverter is connected to the second input/output node (316). When used to drive a typical micromirror cell, the address electrode of the micromirror cell are electrically connected to the first input/output node (314) and the second input/output node (316).
摘要翻译： 用于诸如微镜阵列的应用中的改进的存储单元（300），其中容纳很少的空间和缓慢的回读周期。 存储器（300）包括连接到第一反相器的输入端和第二反相器的输出端的第一输入/输出节点（314）。 第一反相器由两个晶体管（304,306）组成，并将信号驱动到第二输入/输出节点（316）。 第二反相器的输入连接到第二输入/输出节点（316）。 当用于驱动典型的微镜单元时，微镜单元的寻址电极电连接到第一输入/输出节点（314）和第二输入/输出节点（316）。
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公开(公告)号：US6028690A
公开(公告)日：2000-02-22
申请号：US197723
申请日：1998-11-23
CPC分类号： G02B26/0841
摘要： A micromirror array fabricated on a semiconductor substrate 708. The micromirrors in the micromirror array logically divided into an interior active region 704 which selectively modulates light striking the mirrors in the interior active region 704, and an exterior border region 702 for producing a dark border around the image produced by the interior active region 704. A gap between each mirror allows adjacent mirrors to rotate. The gap 712 between mirrors in the interior active region 704 of the array is larger than the gap 710 between at least some of the mirrors in the exterior border region 702. The smaller gap 710 in the exterior region 702 is enabled by restricting mirrors in the exterior region 702 to a single direction of rotation.
摘要翻译： 制造在半导体衬底708上的微镜阵列。微反射镜阵列中的微反射镜在逻辑上被分为内部有源区域704，该有源区域选择性地调制在内部有源区域704中的反射镜的入射光，以及外部边界区域702，用于产生围绕 由内部有源区域704产生的图像。每个反射镜之间的间隙允许相邻的反射镜旋转。 阵列的内部有源区域704中的反射镜之间的间隙712大于外部边界区域702中的至少一些反射镜之间的间隙710.外部区域702中的较小间隙710通过限制外部区域702中的反射镜来实现 外部区域702到单个旋转方向。
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3.发明授权Self-test circuit for high-definition multimedia interface integrated circuits 有权用于高分辨率多媒体接口集成电路的自检电路公开(公告)号：US07617064B2
公开(公告)日：2009-11-10
申请号：US11403082
申请日：2006-04-12
申请人： Barry L. Stakely , Rodney D. Miller , Jingang Yi
发明人： Barry L. Stakely , Rodney D. Miller , Jingang Yi
CPC分类号： G01R31/3167 , G06F11/221 , G09G3/006 , G09G5/006 , G09G2330/04 , G09G2370/12
摘要： A high-definition multimedia interface circuit uses a high-definition multimedia interface encoder to produce a plurality of channels of data. An output circuit, connected to the high-definition multimedia interface encoder, produces a plurality of channels of high frequency data from the data produced by the high-definition multimedia interface encoder. A multiplexer selects a channel for sampling, and a capacitive coupler capacitively couples the multiplexer to a sampling circuit. The sampling circuit produces sampled data corresponding to the high frequency data having a clock rate less than a clock rate of the high frequency data. A test circuit compares the sampled data with the data produced by the high-definition multimedia interface encoder.
摘要翻译： 高分辨率多媒体接口电路使用高分辨率多媒体接口编码器来产生多个数据通道。 连接到高分辨率多媒体接口编码器的输出电路从由高分辨率多媒体接口编码器产生的数据产生多个高频数据通道。 多路复用器选择用于采样的信道，并且电容耦合器将多路复用器电容耦合到采样电路。 采样电路产生对应于具有小于高频数据的时钟速率的时钟速率的高频数据的采样数据。 测试电路将采样数据与高分辨率多媒体接口编码器产生的数据进行比较。
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4.发明授权System and method for synchronous clock re-generation from a non-synchronous interface 有权从非同步接口重新生成同步时钟的系统和方法公开(公告)号：US07391836B2
公开(公告)日：2008-06-24
申请号：US11087349
申请日：2005-03-23
申请人： Rodney D. Miller , Steven L. Backer
发明人： Rodney D. Miller , Steven L. Backer
IPC分类号： H04L7/00
CPC分类号： H04N7/163 , H04N5/765 , H04N21/4305 , H04N21/4363 , H04N21/4402
摘要： A system and method transmits data received at varying frequencies at a fixed data rate. The frequency dependent data and associated data clock signal are received and the frequency dependent data is converted to frequency independent data. A ratio of a number of data clock cycles to a number of reference clock cycles is determined and transmitted. The frequency independent data and header data are transmitted, at a fixed rate, to a receiver, the fixed rate being a frequency greater than the frequency of the associated data clock signal. The received the frequency independent data is converted to frequency dependent data based upon the received determined ratio. The communication channel may include an optical fiber and a tension member wherein control data is transmitted along the tension member and graphic data is transmitted along the optical fiber.
摘要翻译： 系统和方法以固定数据速率发送以变化的频率接收的数据。 接收与频率相关的数据和相关数据时钟信号，并将频率相关数据转换为频率无关数据。 数据时钟周期数与多个参考时钟周期的比率被确定并传输。 频率无关数据和标题数据以固定速率传输到接收机，固定速率是大于相关数据时钟信号频率的频率。 接收的频率无关数据根据接收到的确定的比率被转换为频率相关数据。 通信信道可以包括光纤和张力构件，其中控制数据沿张力构件传输，并且图形数据沿着光纤传输。
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公开(公告)号：US5943157A
公开(公告)日：1999-08-24
申请号：US73329
申请日：1998-05-06
CPC分类号： G02B26/0841
摘要： A spatial light modulator (70) comprised of an array of micromirrors (72) each having support post (74). The support post (74) defines support post edges (76) in the upper surface of the mirrors (72). These support post edges (76) are all oriented at 45 degree angles with respect to an incident beam of light from a light source (80) to minimize diffraction of light from the edges (76) into the darkfield optics when the mirrors are oriented in the off-state. The present invention achieves an increased contrast ratio of about 20% over conventional designs.
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6.发明授权
公开(公告)号：US5706123A
公开(公告)日：1998-01-06
申请号：US720367
申请日：1996-09-27
申请人： Rodney D. Miller , Richard O. Gale , Henry Chung-Hsin Chu , Harlan Paul Cleveland , Rabah Mezenner
发明人： Rodney D. Miller , Richard O. Gale , Henry Chung-Hsin Chu , Harlan Paul Cleveland , Rabah Mezenner
CPC分类号： G02B26/0841
摘要： A method of providing control signals for resetting mirror elements (10,20) of a digital micro-mirror device (DMD) having reset groups (FIG. 4), or for resetting moveable elements of other micro-mechanical devices that operate with similar principles. A bias voltage is applied to the mirrors and their landing sites, and an address voltage is applied under the mirrors. (FIG. 3). The address voltage is held at an intermediate level except during a reset period. During this reset period, the address voltage is increased. Also, during reset, the bias applied to mirrors to be reset is pulsed and offset, and the bias applied to mirrors not to be reset is increased. (FIGS. 5 and 6).
摘要翻译： 一种提供用于重置具有复位组（图4）的数字微镜装置（DMD）的镜元件（10,20）的控制信号的方法，或用于重置以类似原理操作的其它微机械装置的可移动元件 。 反射镜及其着陆点施加偏置电压，并在反射镜下施加寻址电压。 （图3）。 地址电压保持在中间电平，除了复位期间。 在该复位期间，地址电压增加。 此外，在复位期间，施加到待复位的反射镜的偏置被脉冲和偏移，并且施加到不被复位的反射镜的偏置增加。 （图5和图6）。
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7.发明授权公开(公告)号：US08259891B2
公开(公告)日：2012-09-04
申请号：US12714765
申请日：2010-03-01
IPC分类号： H03D3/24
CPC分类号： H03L7/107 , H03L2207/06
摘要： A digital video interface receiver adjusts a transfer function of a phase-locked loop circuit having a programmable charge pump, a programmable phase-locked loop filter, or a programmable gain voltage controlled oscillator. The digital video interface receiver monitors and detects errors in a data stream associated with the phase-locked loop circuit. Moreover, the digital video interface receiver changes the transfer function of the phase-locked loop circuit, in response to the detected errors, by changing parameters associated with the programmable charge pump, the programmable phase-locked loop filter, or the programmable gain voltage controlled oscillator of the phase-locked loop circuit so as to change the transfer function of the phase-locked loop circuit.
摘要翻译： 数字视频接口接收机调节具有可编程电荷泵，可编程锁相环路滤波器或可编程增益压控振荡器的锁相环电路的传递函数。 数字视频接口接收器监视和检测与锁相环电路相关联的数据流中的错误。 此外，数字视频接口接收器通过改变与可编程电荷泵，可编程锁相环路滤波器或可编程增益电压控制相关联的参数来响应于检测到的错误来改变锁相环电路的传递函数 锁相环电路的振荡器，以便改变锁相环电路的传递函数。
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8.发明授权Self-test circuit for high-definition multimedia interface integrated circuits 有权用于高分辨率多媒体接口集成电路的自检电路公开(公告)号：US08014968B2
公开(公告)日：2011-09-06
申请号：US12567324
申请日：2009-09-25
申请人： Barry L. Stakely , Rodney D. Miller , Jingang Yi
发明人： Barry L. Stakely , Rodney D. Miller , Jingang Yi
CPC分类号： G01R31/3167 , G06F11/221 , G09G3/006 , G09G5/006 , G09G2330/04 , G09G2370/12
摘要： A high-definition multimedia interface circuit uses a high-definition multimedia interface encoder to produce a plurality of channels of data. An output circuit, connected to the high-definition multimedia interface encoder, produces a plurality of channels of high frequency data from the data produced by the high-definition multimedia interface encoder. A multiplexer selects a channel for sampling, and a capacitive coupler capacitively couples the multiplexer to a sampling circuit. The sampling circuit produces sampled data corresponding to the high frequency data having a clock rate less than a clock rate of the high frequency data. A test circuit compares the sampled data with the data produced by the high-definition multimedia interface encoder.
摘要翻译： 高分辨率多媒体接口电路使用高分辨率多媒体接口编码器来产生多个数据通道。 连接到高分辨率多媒体接口编码器的输出电路从由高分辨率多媒体接口编码器产生的数据产生多个高频数据通道。 多路复用器选择用于采样的信道，并且电容耦合器将多路复用器电容耦合到采样电路。 采样电路产生对应于具有小于高频数据的时钟速率的时钟速率的高频数据的采样数据。 测试电路将采样数据与高分辨率多媒体接口编码器产生的数据进行比较。
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9.发明申请公开(公告)号：US20100023825A1
公开(公告)日：2010-01-28
申请号：US12567324
申请日：2009-09-25
申请人： Barry L. STAKELY , Rodney D. MILLER , Jingang YI
发明人： Barry L. STAKELY , Rodney D. MILLER , Jingang YI
CPC分类号： G01R31/3167 , G06F11/221 , G09G3/006 , G09G5/006 , G09G2330/04 , G09G2370/12
摘要： A high-definition multimedia interface circuit uses a high-definition multimedia interface encoder to produce a plurality of channels of data. An output circuit, connected to the high-definition multimedia interface encoder, produces a plurality of channels of high frequency data from the data produced by the high-definition multimedia interface encoder. A multiplexer selects a channel for sampling, and a capacitive coupler capacitively couples the multiplexer to a sampling circuit. The sampling circuit produces sampled data corresponding to the high frequency data having a clock rate less than a clock rate of the high frequency data. A test circuit compares the sampled data with the data produced by the high-definition multimedia interface encoder.
摘要翻译： 高分辨率多媒体接口电路使用高分辨率多媒体接口编码器来产生多个数据通道。 连接到高分辨率多媒体接口编码器的输出电路从由高分辨率多媒体接口编码器产生的数据产生多个高频数据通道。 多路复用器选择用于采样的信道，并且电容耦合器将多路复用器电容耦合到采样电路。 采样电路产生对应于具有小于高频数据的时钟速率的时钟速率的高频数据的采样数据。 测试电路将采样数据与高分辨率多媒体接口编码器产生的数据进行比较。
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公开(公告)号：US06195301B1
公开(公告)日：2001-02-27
申请号：US09468561
申请日：1999-12-21
IPC分类号： G11C700
摘要： An auxiliary line driver (514) able to sense data driven on a signal path (502) by a primary line driver (512), and then drive the data on the signal path (502). The auxiliary driver (514) allows a small primary line driver (512) to drive a large load, or a large number of loads (504, 506) without consuming a large area in the region where the primary line driver (512) is fabricated. The auxiliary line driver is particularly useful for driving the memory array of a micromirror device, especially during a block clear operation in which a large number of memory cells (506) are written to simultaneously. When the auxiliary line driver (514) receives an enable signal (518), the auxiliary line driver drives the last input provided to the input of the auxiliary line driver (514).
摘要翻译： 辅助线路驱动器（514），其能够感测由主线驱动器（512）在信号路径（502）上驱动的数据，然后驱动信号路径（502）上的数据。 辅助驱动器（514）允许小的主要线路驱动器（512）驱动大的负载或大量的负载（504,506），而不会在制造主线路驱动器（512）的区域中消耗大的面积 。 辅助线路驱动器特别适用于驱动微镜器件的存储器阵列，特别是在其中大量存储器单元（506）被同时写入的块清除操作期间。 当辅助线路驱动器（514）接收到使能信号（518）时，辅助线路驱动器驱动提供给辅助线路驱动器（514）的输入端的最后输入。
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