公开(公告)号：US20080014747A1

公开(公告)日：2008-01-17

申请号：US11626151

申请日：2007-01-23

申请人： KARL M. BROWN ,  JOHN A. PIPITONE ,  VINEET H. MEHTA

发明人： KARL M. BROWN ,  JOHN A. PIPITONE ,  VINEET H. MEHTA

IPC分类号： H01L21/302

CPC分类号： H01L21/02063 ,  H01J37/32091 ,  H01J37/32706 ,  H01J2237/20

摘要： A method of fabricating multilayer interconnect structures on a semiconductor wafer begins by roughening the interior surface of a metal lid to a surface roughness in excess of SA 2000 with a reentrant surface profile, and installing the metal lid as the ceiling of a plasma clean reactor chamber having a wafer pedestal facing the interior surface of the ceiling. Conductive vias are formed in a dielectric layer of the semiconductor wafer, which are then covered with an overlying dielectric layer. High aspect ratio openings are etched through the overlying dielectric layer to the conductive via to expose a face of the conductive via. This step is followed by a preclean step for removing residue from the exposed face of each conductive via while capturing at least a portion of the residue on the roughened interior surface of the lid. This preclean step consists of: (1) placing the wafer on the wafer pedestal of the plasma clean reactor chamber and introducing an inert gas into the preclean reactor chamber; (2) coupling VHF plasma source power of 60 MHz or greater to the wafer pedestal with sufficient power to establish an etch rate on the order of 200-500 Å/min; and (3) coupling LF or HF plasma bias power of 13.56 MHz or less with sufficient power to realize the etch rate at the bottom surfaces of the high aspect ratio openings, and removing the wafer from the plasma clean reactor chamber.

摘要翻译： 在半导体晶片上制造多层互连结构的方法首先通过将金属盖的内表面粗糙化为超过SA 2000的表面粗糙度而具有折入表面轮廓，并且将金属盖安装为等离子体清洁反应器室的顶部 具有面向天花板内表面的晶片基座。 导电通孔形成在半导体晶片的电介质层中，然后用覆盖的介电层覆盖。 通过上覆电介质层将高纵横比开口蚀刻到导电通孔，以露出导电通孔的表面。 该步骤之后是用于从每个导电通孔的暴露面去除残留物的预清洗步骤，同时捕获盖的粗糙化内表面上的至少一部分残余物。 该预清洗步骤包括：（1）将晶片放置在等离子体清洁反应器室的晶片基座上，并将惰性气体引入预清洗反应器室中; （2）以足够的功率将60MHz或更高的VHF等离子体源功率耦合到晶片基座，以建立约200-500埃/分钟的蚀刻速率; 和（3）以13.56MHz或更小的LF或HF等离子体偏置功率与足够的功率耦合以实现高纵横比开口的底表面处的蚀刻速率，以及从等离子体清洁反应器室中移除晶片。