Protocol translation in a storage system
    11.
    发明授权
    Protocol translation in a storage system 有权
    存储系统中的协议转换

    公开(公告)号:US07404000B2

    公开(公告)日:2008-07-22

    申请号:US10051415

    申请日:2002-01-18

    CPC classification number: H04L67/1097 H04L69/08

    Abstract: A storage switch in accordance with an embodiment of the invention is a highly scalable switch that allows the creation of a SAN that is easy to deploy and that can be centrally managed. Moreover, such a storage switch also allows the deployment of a global infrastructure, allowing the resources of the SAN, such as storage devices, to essentially be positioned anywhere on the globe. Further, such a storage switch allows a multi-protocol SAN, e.g., one that includes both iSCSI or Fibre Channel, and processes data packets at “wire speed.” To further enable wire-speed processing, a switch in accordance with the invention has “intelligence” distributed to each of its linecards, through which it classifies packets into data and control packets, it performs virtualization functions, and it performs protocol translation functions. A switch in accordance with the invention further performs serverless storage services such as mirroring, snapshot, and replication.

    Abstract translation: 根据本发明的实施例的存储交换机是高度可扩展的交换机,其允许创建易于部署并且可以集中管理的SAN。 此外,这样的存储交换机还允许部署全球基础设施,从而允许诸如存储设备的SAN的资源基本上位于全球任何地方。 此外,这种存储交换机允许多协议SAN,例如包括iSCSI或光纤通道的协议SAN,并且以“线速度”处理数据分组。 为了进一步实现线速处理,根据本发明的交换机具有分布到其每个线路卡的“智能”,通过该交换机将分组分组成数据和控制分组,它执行虚拟化功能,并且执行协议转换功能。 根据本发明的交换机还执行无服务器存储服务,例如镜像,快照和复制。

    High-performance non-volatile RAM protected write cache accelerator
system employing DMA and data transferring scheme
    12.
    发明授权
    High-performance non-volatile RAM protected write cache accelerator system employing DMA and data transferring scheme 失效
    采用DMA和数据传输方案的高性能非易失性RAM保护写缓存加速器系统

    公开(公告)号:US5701516A

    公开(公告)日:1997-12-23

    申请号:US588203

    申请日:1996-01-19

    Abstract: A data storage system is coupled to a host computer system for the transfer of data between the host and a plurality of data storage devices. The data storage devices are coupled to a plurality of data transfer channels with each data storage channel be coupled to at least a respective one of the data storage devices. Each data transfer channel includes a data buffer and an autonomously operating controller for transferring between the channels data buffer and data storage device. A non-volatile random access storage memory is provided to store cached pages of data. An interface couples the data storage system to the host and through which data is transferred. A reconfigurable data path permits selective data transfer couplings between the data transfers channels, the non-volatile memory, and the interface. A controller directs the configuration of the data path and controls a direct memory access controller for burst transferring data between the interface and the channel data buffers, between the interface and the non-volatile memory and between the non-volatile memory and the channel data buffers.

    Abstract translation: 数据存储系统耦合到主计算机系统,用于在主机和多个数据存储设备之间传送数据。 数据存储设备耦合到多个数据传输通道,每个数据存储通道耦合到数据存储设备中的至少一个。 每个数据传输通道包括数据缓冲器和用于在通道数据缓冲器和数据存储设备之间传送的自主操作的控制器。 提供非易失性随机存取存储器来存储缓存的数据页。 一个接口将数据存储系统连接到主机,通过哪个数据传输。 可重新配置的数据路径允许数据传输通道,非易失性存储器和接口之间的选择性数据传输耦合。 控制器指导数据路径的配置并控制直接存储器存取控制器,用于在接口和通道数据缓冲器之间,接口和非易失性存储器之间以及非易失性存储器和通道数据缓冲器之间的突发传送数据 。

    Multiple peripheral adapter device driver architecture
    13.
    发明授权
    Multiple peripheral adapter device driver architecture 失效
    多个外设适配器设备驱动程序架构

    公开(公告)号:US5586268A

    公开(公告)日:1996-12-17

    申请号:US398302

    申请日:1995-03-03

    CPC classification number: G06F13/102 G05B2219/31181 G05B2219/33118

    Abstract: A single instance of a device driver is used to control multiple peripheral devices in a computer system having a central processor for executing an operating system, a memory, and first and second interface buses permitting interconnection of peripheral adapters with the central processor. The interface buses each correspond to different classes of peripheral adapters. The device driver includes an initialization routine for scanning the interface buses to identify predetermined functionally related peripheral adapters. A communications path is provided between the operating system and each of the peripheral adapters of a form appropriate for the particular interface bus connected to each adapter. A control path is also provided between each of the peripheral adapters and the operating system of a form appropriate for the particular interface bus connected to each adapter. The device driver provides for the common control and management of the communications and control paths between the operating system and each of the peripheral adapters.

    Abstract translation: 设备驱动器的单个实例被用于控制具有用于执行操作系统的中央处理器的计算机系统中的多个外围设备,存储器以及允许外围适配器与中央处理器互连的第一和第二接口总线。 接口总线各自对应于不同类别的外设适配器。 设备驱动器包括用于扫描接口总线以识别预定的与功能相关的外围适配器的初始化程序。 在操作系统和适合于连接到每个适配器的特定接口总线的形式的每个外围适配器之间提供通信路径。 在每个外围适配器和适用于连接到每个适配器的特定接口总线的形式的操作系统之间还提供控制路径。 设备驱动程序提供操作系统和每个外围适配器之间的通信和控制路径的公共控制和管理。

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