公开(公告)号：US20230259278A1

公开(公告)日：2023-08-17

申请号：US18138016

申请日：2023-04-21

Applicant: QUANTUM CORPORATION

Inventor： Roderick B. Wideman ,  Turguy Goker ,  Suayb S. Arslan

IPC: G06F3/06 ,  G06F12/126 ,  G06F12/0868

CPC classification number: G06F3/0607 ,  G06F12/126 ,  G06F12/0868 ,  G06F3/0661 ,  G06F3/0682 ,  G06F3/0686 ,  G06F2212/1016 ,  G06F2212/213 ,  G06F2212/222 ,  G06F2212/314

Abstract: A method for implementing an object store using removable storage media includes the steps of receiving a request to retrieve first data; determining a first data object in which at least a portion of the first data is stored; determining a removable storage medium on which the first data object is stored, the removable storage medium including a value store partition into which one or more data objects including at least the first data object are stored and a key store partition into which one or more keys identifying the one or more data objects are stored; retrieving the first data object from the value store partition; and retrieving the at least a portion of the first data from the first data object. The method can further be performed using a data management system and/or one or more non-transitory computer-readable storage media.

公开(公告)号：US20230144287A1

公开(公告)日：2023-05-11

申请号：US18047982

申请日：2022-10-19

Applicant: Unification Technologies LLC

Inventor： David Flynn ,  Jonathan Thatcher ,  Michael Zappe

IPC: G06F12/121 ,  G06F1/18 ,  G06F3/06 ,  G06F9/52 ,  G06F11/10 ,  G06F12/0804 ,  G06F12/0868 ,  G06F13/28 ,  G06F13/40 ,  H05K7/14 ,  G06F12/02 ,  H04L67/02 ,  G06F13/42 ,  G06F12/12 ,  G06F12/123 ,  G06F9/54

CPC classification number: G06F12/121 ,  G06F1/183 ,  G06F3/0613 ,  G06F3/0656 ,  G06F3/0685 ,  G06F3/0688 ,  G06F9/52 ,  G06F11/108 ,  G06F12/0804 ,  G06F12/0868 ,  G06F13/28 ,  G06F13/4022 ,  H05K7/1444 ,  H05K7/1487 ,  G06F12/0246 ,  H04L67/02 ,  G06F13/426 ,  G06F3/0604 ,  G06F3/0608 ,  G06F3/0659 ,  G06F12/12 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0652 ,  G06F12/123 ,  G06F3/0679 ,  G06F3/0643 ,  G06F9/54 ,  G06F2211/103 ,  G06F2212/222 ,  H04L67/1097

Abstract: A method for managing data in a NAND flash storage system is provided. The method includes one or more of receiving an empty data segment directive at a storage controller, returning a data string including data of a predetermined logic level in response to a read command requesting to read data associated with a logical identifier included in the empty data segment directive, maintaining an index of mapping between the logical identifier and a physical storage location, updating the index to indicate data at the physical storage location does not need to be preserved, monitoring one or more physical storage locations, including the physical storage location, to determine a percentage of the one or more physical storage locations that do not need to be preserved, and initiating garbage collection on the one or more physical storage locations in response to the percentage reaching a threshold. The empty data segment directive includes a logical identifier associated with the physical storage location.

公开(公告)号：US20180373636A1

公开(公告)日：2018-12-27

申请号：US16062860

申请日：2016-04-01

Applicant: SK TELECOM CO., LTD. ,  INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY

Inventor： Hong Chan ROH ,  Sang Hyun PARK ,  Jong Chan LEE ,  Hong Kyu PARK ,  Jae Hyung KIM

IPC: G06F12/0866 ,  G06F12/0811

CPC classification number: G06F12/0866 ,  G06F12/0238 ,  G06F12/0811 ,  G06F13/16 ,  G06F2212/1024 ,  G06F2212/222 ,  G06F2212/46 ,  G06F2212/7203

Abstract: The present disclosure relates to a memory control device which can distribute and transfer a read request for cache hit data so as to allow a hard disk as well as a cache memory to process the read request, thereby maximizing the throughput of the entire storage device, and an operation method of the memory control device.

公开(公告)号：US20180307610A1

公开(公告)日：2018-10-25

申请号：US15955028

申请日：2018-04-17

Applicant: EMC IP Holding Company LLC

Inventor： Leon Zhang ,  Lester Zhang ,  Chen Gong

IPC: G06F12/0871 ,  G06F13/16 ,  G06F13/12

CPC classification number: G06F12/0871 ,  G06F13/126 ,  G06F13/1642 ,  G06F2212/222

Abstract: Embodiments of the present disclosure relate to a method and device and computer readable medium for storage management. The method comprises determining a queuing condition of I/O requests of a cache of a first file system in a storage, the cache including at least one flash block. The method further includes determining a load condition of the cache based on the queuing condition of the I/O requests. Moreover, the method further includes in response to determining that the cache is in a busy status, allocating to the cache at least one additional flash block from a second file system in the storage, the second file system being different from the first file system.

公开(公告)号：US20180285282A1

公开(公告)日：2018-10-04

申请号：US15477037

申请日：2017-04-01

Applicant: Intel Corporation

Inventor： Andrzej Jakowski ,  Kapil Kumar Karkra

IPC: G06F12/0891 ,  G06F12/0897

CPC classification number: G06F12/0897 ,  G06F12/0246 ,  G06F12/0804 ,  G06F12/0811 ,  G06F12/121 ,  G06F2212/1024 ,  G06F2212/222 ,  G06F2212/7205

Abstract: In one embodiment, a processor comprises a processing core; and a cache controller to send a plurality of write requests to a cache storage device to store cache lines of a stream block, the plurality of write requests each including a stream identifier of the stream block, wherein a capacity of the stream block is equal to a capacity of an erase block of the cache storage device and wherein the erase block is dedicated to storing cache lines of the stream block; determine to evict the stream block from the cache storage device based upon a determination that space is not available in the cache storage device to cache data received from a first storage device; and send a deallocation request to the cache storage device to deallocate all cache lines of the stream block to enable the cache storage device to erase the erase block.

公开(公告)号：US10083118B2

公开(公告)日：2018-09-25

申请号：US14775801

申请日：2014-03-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bokdeuk Jeong ,  Sungmin Lee

IPC: G06F12/0893 ,  G11C15/04 ,  G06F12/02 ,  G06F17/30

CPC classification number: G06F12/0893 ,  G06F12/0246 ,  G06F16/1847 ,  G06F2212/222 ,  G11C15/046

Abstract: The present invention relates to a data storage system. The present invention provides a key value-based data storage system and an operation method thereof, the data storage system comprising: computing nodes, each of which includes a substrate module, a central processing unit, a memory arranged in the substrate module, and a NAND flash storage for cache storage; and a communication interface for interconnecting the computing nodes, wherein the computing nodes support key value-based data processing.

公开(公告)号：US10078595B2

公开(公告)日：2018-09-18

申请号：US15822189

申请日：2017-11-26

Applicant: International Business Machines Corporation

Inventor： Brian E. Bakke ,  Joseph R. Edwards ,  Robert E. Galbraith ,  Adrian C. Gerhard ,  Daniel F. Moertl ,  Gowrisankar Radhakrishnan ,  Rick A. Weckwerth

IPC: G06F12/0895 ,  G06F12/123 ,  G06F12/0868 ,  G06F12/0891 ,  G06F12/0893 ,  G06F13/28 ,  G06F13/42 ,  G06F13/40

CPC classification number: G06F12/0895 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0665 ,  G06F3/0689 ,  G06F11/1076 ,  G06F12/0806 ,  G06F12/0868 ,  G06F12/0888 ,  G06F12/0891 ,  G06F12/0893 ,  G06F12/122 ,  G06F12/123 ,  G06F12/128 ,  G06F13/28 ,  G06F13/4022 ,  G06F13/4282 ,  G06F2212/1024 ,  G06F2212/222 ,  G06F2212/262 ,  G06F2212/286 ,  G06F2212/312 ,  G06F2212/313 ,  G06F2212/401 ,  G06F2212/604 ,  G06F2212/6042 ,  G06F2212/621

Abstract: A method and controller for implementing storage adapter enhanced write cache management, and a design structure on which the subject controller circuit resides are provided. The controller includes a hardware write cache engine implementing hardware acceleration for storage write cache management. The hardware write cache engine monitors cache levels used for managing cache destage rates and thresholds for destages from storage write cache substantially without using firmware for greatly enhancing performance.

公开(公告)号：US10037279B1

公开(公告)日：2018-07-31

申请号：US13527761

申请日：2012-06-20

Applicant: Ron Bigman ,  Nir Sela ,  Adi Hirschtein

Inventor： Ron Bigman ,  Nir Sela ,  Adi Hirschtein

IPC: G06F12/00 ,  G06F12/0846 ,  G06F12/0891 ,  G06F12/0888

CPC classification number: G06F12/0848 ,  G06F12/084 ,  G06F12/0877 ,  G06F12/0888 ,  G06F12/0891 ,  G06F2212/1016 ,  G06F2212/222 ,  G06F2212/261 ,  G06F2212/28 ,  G06F2212/311 ,  G06F2212/45 ,  G06F2212/60

Abstract: A data storage subsystem includes a data storage array and a host device in communication with the data storage array. Applications on servers and user terminals communicate with the host to access data maintained by the storage array. In order to enhance performance, the host includes a cache resource and a computer program including cache configuration logic which determines whether an IO received from an application is associated with a predetermined type of business process, and configures the cache resource to store data associated with the received IO where it is determined that the IO is associated with the predetermined type of business process, thereby enabling the data to be available directly from the host without accessing the storage subsystem in response to a subsequent Read request.

公开(公告)号：US10019363B2

公开(公告)日：2018-07-10

申请号：US15507606

申请日：2015-04-03

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Douglas L. Voigt ,  Charles B. Morrey, III ,  Jishen Zhao ,  Dhruva Chakrabarti ,  Joseph E. Foster

IPC: G06F13/12 ,  G06F12/0817 ,  G06F12/1009 ,  G06F9/46

CPC classification number: G06F12/0828 ,  G06F9/467 ,  G06F12/0238 ,  G06F12/08 ,  G06F12/1009 ,  G06F2212/1016 ,  G06F2212/1032 ,  G06F2212/222 ,  G06F2212/60 ,  G06F2212/621 ,  G06F2212/7201

Abstract: Example implementations may relate to a version controller allocating a copy page in persistent memory upon receiving, from an application executing on a processor, a copy command to version an image page for an atomic transaction. The version controller may receive application data addressed to a cache line of the image page, and may write the application data to a cache line of the copy page corresponding to the addressed cache line of the image page. If the version controller receives a replace-type transaction commit command, the version controller may generate a final page by either forward merging the image page into the copy page or backward merging the copy page into the image page, depending a merge direction policy.

公开(公告)号：US20180189178A1

公开(公告)日：2018-07-05

申请号：US15393863

申请日：2016-12-29

Applicant: Intel Corporation

Inventor： Maciej Kaminski ,  Andrzej Jakowski ,  Piotr Wysocki

IPC: G06F12/0811 ,  G06F12/0846 ,  G06F12/128 ,  G06F12/0871

CPC classification number: G06F12/0871 ,  G06F11/1076 ,  G06F12/0804 ,  G06F12/0851 ,  G06F12/128 ,  G06F2212/1016 ,  G06F2212/222 ,  G06F2212/283 ,  G06F2212/286 ,  G06F2212/604

Abstract: An embodiment of a cache apparatus may include a first cache memory, a second cache memory, and a cache controller communicatively coupled to the first cache memory and the second cache memory to allocate cache storage for clean data from one of either the first cache memory or the second cache memory, and allocate cache storage for dirty data from both the first cache memory and the second cache memory. Other embodiments are disclosed and claimed.