公开(公告)号：US20140181415A1

公开(公告)日：2014-06-26

申请号：US13723285

申请日：2012-12-21

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Gabriel Loh ,  Nuwan Jayasena ,  James O'Connor ,  Michael Schulte ,  Michael Ignatowski

IPC: G06F12/08

CPC classification number: G06F12/0862

Abstract: Prefetching functionality on a logic die stacked with memory is described herein. A device includes a logic chip stacked with a memory chip. The logic chip includes a control block, an in-stack prefetch request handler and a memory controller. The control block receives memory requests from an external source and determines availability of the requested data in the in-stack prefetch request handler. If the data is available, the control block sends the requested data to the external source. If the data is not available, the control block obtains the requested data via the memory controller. The in-stack prefetch request handler includes a prefetch controller, a prefetcher and a prefetch buffer. The prefetcher monitors the memory requests and based on observed patterns, issues additional prefetch requests to the memory controller.

Abstract translation: 本文描述了在与存储器堆叠的逻辑管芯上的预取功能。 一种器件包括堆叠有存储器芯片的逻辑芯片。 逻辑芯片包括控制块，堆叠预取请求处理程序和存储器控制器。 控制块从外部源接收存储器请求，并确定栈内预取请求处理程序中所请求数据的可用性。 如果数据可用，则控制块将所请求的数据发送到外部源。 如果数据不可用，则控制块通过存储器控制器获得所请求的数据。 栈内预取请求处理程序包括预取控制器，预取器和预取缓冲区。 预取器监视存储器请求并基于观察到的模式，向存储器控制器发出额外的预取请求。