STICKY BIT UPDATE WITHIN A SPECULATIVE EXECUTION PROCESSING ENVIRONMENT
    11.
    发明申请
    STICKY BIT UPDATE WITHIN A SPECULATIVE EXECUTION PROCESSING ENVIRONMENT 有权
    在执行执行环境中的贴纸位更新

    公开(公告)号:US20140181485A1

    公开(公告)日:2014-06-26

    申请号:US13724046

    申请日:2012-12-21

    Applicant: ARM LIMITED

    CPC classification number: G06F9/30087 G06F9/3804 G06F9/3842 G06F9/3865

    Abstract: A data processing apparatus 2 supports speculative execution and the use of sticky bits. A different version of a sticky bit is associated with each segment of the speculative program flow. The segments of the program flow are separated by speculation nodes corresponding to program instructions which may be followed by a plurality of different alternative program instruction serving as the next program instruction. When a speculation node is resolved, then the segments separated by that speculation node are merged and the sticky bit values for those two segments are merged.

    Abstract translation: 数据处理装置2支持推测执行和使用粘滞位。 粘性位的不同版本与推测程序流的每个段相关联。 节目流的片段由对应于节目指令的推测节点分开,节目指令可以跟随作为下一节目指令的多个不同的备选节目指令。 当一个猜测节点被解析时,由该推测节点分隔的段被合并,并且这两个段的粘滞位值被合并。

    APPARATUS AND METHOD FOR MAPPING ARCHITECTURAL REGISTERS TO PHYSICAL REGISTERS
    12.
    发明申请
    APPARATUS AND METHOD FOR MAPPING ARCHITECTURAL REGISTERS TO PHYSICAL REGISTERS 审中-公开
    将建筑物寄存器映射到物理寄存器的装置和方法

    公开(公告)号:US20140164742A1

    公开(公告)日:2014-06-12

    申请号:US13927552

    申请日:2013-06-26

    Applicant: ARM Limited

    Abstract: An apparatus and method are provided for performing register renaming. Available register identifying circuitry is provided to identify which physical registers form a pool of physical registers available to be mapped by register renaming circuitry to an architectural register specified by an instruction to be executed. Configuration data whose value is modified during operation of the processing circuitry is stored such that, when the configuration data has a first value, the configuration data identifies at least one architectural register of the architectural register set which does not require mapping to a physical register by the register renaming circuitry. The register identifying circuitry is arranged to reference the modified data value, such that when the configuration data has the first value, the number of physical registers in the pool is increased due to the reduction in the number of architectural registers which require mapping to physical registers.

    Abstract translation: 提供了一种用于执行寄存器重命名的装置和方法。 提供可用的寄存器识别电路以识别哪些物理寄存器形成可由寄存器重命名电路映射到由要执行的指令指定的架构寄存器的物理寄存器池。 存储其值在处理电路的操作期间被修改的配置数据,使得当配置数据具有第一值时,配置数据识别架构寄存器集合的至少一个体系结构寄存器,其不需要映射到物理寄存器 寄存器重命名电路。 寄存器识别电路被布置为引用修改的数据值,使得当配置数据具有第一值时,由于需要映射到物理寄存器的架构寄存器的数量的减少,池中的物理寄存器的数量增加 。

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