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公开(公告)号:US20200243261A1
公开(公告)日:2020-07-30
申请号:US16751323
申请日:2020-01-24
Applicant: AVX Corporation
Inventor: Marianne Berolini , Jeffrey A. Horn , Richard C. VanAlstine
Abstract: A broadband multilayer ceramic capacitor may include a monolithic body including a plurality of dielectric layers stacked in the Z-direction, a first external terminal, and a second external terminal. A plurality of active electrodes, a bottom shield electrode, and a top shield electrode may be arranged within the monolithic body. The top shield electrode may be positioned between the active electrodes and a top surface of the capacitor and spaced apart from the top surface of the capacitor by a top-shield-to-top distance. A bottom shield electrode may be positioned between the active electrodes and the bottom surface of the capacitor and spaced apart from the bottom surface of the capacitor by a bottom-shield-to-bottom distance. A ratio of the top-shield-to-top distance to the bottom-shield-to-bottom distance may be between about 0.8 and about 1.2. The bottom-shield-to-bottom distance may range from about 8 microns to about 100 microns.
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公开(公告)号:US20200243259A1
公开(公告)日:2020-07-30
申请号:US16751289
申请日:2020-01-24
Applicant: AVX Corporation
Inventor: Marianne Berolini , Jeffrey A. Horn , Richard C. VanAlstine
Abstract: A multilayer ceramic capacitor may include a monolithic body including a plurality of dielectric layers and a plurality of electrode regions. The plurality of electrode regions can include a dielectric region, an active electrode region, and a shield electrode region. The active electrode region may be located between the dielectric region and the shield electrode region in a Z-direction. The dielectric region may extend from the active electrode region to the top surface of the broadband multilayer ceramic capacitor. The capacitor may include a plurality of active electrodes arranged within the active electrode region and at least one shield electrode arranged within the shield electrode region. The dielectric region may be free of electrode layers that extend greater than 25% of a length of the capacitor. A ratio of a capacitor thickness to a thickness of the dielectric region may be less than about 20.
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公开(公告)号:US20190103228A1
公开(公告)日:2019-04-04
申请号:US16132537
申请日:2018-09-17
Applicant: AVX Corporation
Inventor: Craig W. Nies , Andrew P. Ritter , Richard C. VanAlstine
IPC: H01G7/06
Abstract: A tunable multilayer capacitor array is provided. The tunable multilayer capacitor includes a plurality of tunable multilayer capacitors that are connected in parallel. The tunable multilayer capacitor has an initial capacitance value greater than about 0.1 microFarads at an operating voltage greater than about 10 volts. The tunable multilayer capacitor is configured to have a tunable capacitance by applying a DC bias voltage to the tunable multilayer capacitor array.
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