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1.发明授权公开(公告)号：US11563414B2
公开(公告)日：2023-01-24
申请号：US16720042
申请日：2019-12-19
Applicant: AVX Corporation
Inventor： Kwang Choi , Marianne Berolini
IPC: H03H7/01 , H01G4/30 , H01G4/005 , H01G4/12 , H01L49/02 , H01G2/06 , H05K3/46 , H05K1/11 , H03H1/00
Abstract: A multilayer electronic device may include a plurality of dielectric layers stacked in a Z-direction that is perpendicular to an X-Y plane. The device may include a first conductive layer overlying one of the plurality of dielectric layers. The multilayer electronic device may include a second conductive layer overlying another of the plurality of dielectric layers and spaced apart from the first conductive layer in the Z-direction. The second conductive layer may overlap the first conductive layer in the X-Y plane at an overlapping area to form a capacitor. The first conductive layer may have a pair of parallel edges at a boundary of the overlapping area and an offset edge within the overlapping area that is parallel with the pair of parallel edges. An offset distance between the offset edge and at least one of the pair of parallel edges may be less than about 500 microns.
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公开(公告)号：US11361907B2
公开(公告)日：2022-06-14
申请号：US16751345
申请日：2020-01-24
Applicant: AVX Corporation
Inventor： Marianne Berolini , Jeffrey A. Horn , Richard C. VanAlstine
Abstract: A multilayer capacitor may include a monolithic body including a plurality of dielectric layers. A first external terminal may be disposed along a first end, and a second external terminal may be disposed along a second end of the capacitor. The external terminals may include respective bottom portions that extend along a bottom surface of the capacitor. The bottom portions of the external terminals may be spaced apart by a bottom external terminal spacing distance. A bottom shield electrode may be arranged within the monolithic body between a plurality of active electrodes and the bottom surface of the capacitor. The bottom shield electrode may be spaced apart from the bottom surface of the capacitor by a bottom-shield-to-bottom distance that may range from about 3 microns to about 100 microns. A ratio of a length of the capacitor to the bottom external terminal spacing distance may be less than about 4.
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公开(公告)号：US11190157B2
公开(公告)日：2021-11-30
申请号：US16720038
申请日：2019-12-19
Applicant: AVX Corporation
Inventor： Kwang Choi , Marianne Berolini
Abstract: A multilayer filter may include a plurality of dielectric layers stacked in a Z-direction. A first conductive layer may overlie one of the dielectric layers, and a second conductive layer may overlie another of the dielectric layers and be spaced apart from the first conductive layer in the Z-direction. A first via may be connected with the second conductive layer at a first location. A second via may be connected with the second conductive layer at a second location that is spaced apart in a first direction from the first location. The first conductive layer may overlap the second conductive layer at an overlapping area to form a capacitor. At least a portion of the overlapping area may be located between the first location and the second location in the first direction. The second conductive layer may be free of via connections that intersect the overlapping area.
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公开(公告)号：US11031183B2
公开(公告)日：2021-06-08
申请号：US16292738
申请日：2019-03-05
Applicant: AVX Corporation
Inventor： Jeffrey A. Horn , Marianne Berolini
Abstract: The present invention is directed to a multilayer ceramic capacitor comprising a first external terminal disposed along a first end, a second external terminal disposed along a second end that is opposite the first end, and an active electrode region containing alternating dielectric layers and active electrode layers. At least one of the electrode layers comprises a first electrode and a second electrode. The first electrode is electrically connected with the first external terminal and has a first electrode arm comprising a main portion and a step portion. The main portion has a lateral edge extending from the first end of the multilayer capacitor and the step portion has a lateral edge offset from the lateral edge of the main portion. The second electrode is electrically connected with the second external terminal.
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公开(公告)号：US20200258688A1
公开(公告)日：2020-08-13
申请号：US16788804
申请日：2020-02-12
Applicant: AVX Corporation
Inventor： Marianne Berolini , Jeffrey Horn , Jeffrey Cain
Abstract: The present invention is directed to a multilayer ceramic capacitor. The capacitor comprises a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface. The capacitor comprises a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers. A first through-hole conductive via electrically connects the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor. A second through-hole conductive via electrically connects the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor. The at least one side surface does not include an external terminal.
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Patent Agency Ranking
公开(公告)号：US20190172613A1
公开(公告)日：2019-06-06
申请号：US16205271
申请日：2018-11-30
Applicant: AVX Corporation
Inventor： Michael Kirk , Marianne Berolini , Palaniappan Ravindranathan
Abstract: A low aspect ratio varistor is disclosed. The varistor may have a rectangular configuration defining first and second opposing side surfaces offset in a widthwise direction and first and second opposing end surfaces offset in a lengthwise direction. The varistor may include a first electrode layer including a first electrode having an electrode length in the lengthwise direction and an electrode width in the widthwise direction. The varistor may also include a second electrode layer including a second electrode having an electrode length in the lengthwise direction and an electrode width in the widthwise direction. The varistor may also include first and second terminals adjacent and connected with the first and second opposing end surfaces, respectively. At least one of the first or second electrodes may have an electrode aspect ratio less than about 1.
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公开(公告)号：US11735340B2
公开(公告)日：2023-08-22
申请号：US17179585
申请日：2021-02-19
Applicant: AVX Corporation
Inventor： Michael Kirk , Marianne Berolini , Palaniappan Ravindranathan
Abstract: A varistor is provided having a rectangular configuration defining first and second opposing end surfaces offset in a lengthwise direction. The varistor may include a first terminal adjacent the first opposing end surface and a second terminal adjacent the second opposing end surface. The varistor may include an active electrode layer including a first electrode electrically connected with the first terminal and a second electrode electrically connected with the second terminal. The first electrode may be spaced apart from the second electrode in the lengthwise direction to form an active electrode end gap. The varistor may include a floating electrode layer including a floating electrode. The floating electrode layer may be spaced apart from the active electrode layer in a height-wise direction to form a floating electrode gap. A ratio of the active electrode end gap to the floating electrode gap may be greater than about 2.
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公开(公告)号：US11721488B2
公开(公告)日：2023-08-08
申请号：US17190749
申请日：2021-03-03
Applicant: AVX Corporation
Inventor： Jeffrey A. Horn , Marianne Berolini
CPC classification number: H01G4/30 , D02G3/042 , D02G3/045 , D02G3/44 , G09F3/02 , H01G4/008 , H01G4/1227 , H01G4/1245 , H01G4/248 , G09F2003/0223
Abstract: A multilayer ceramic capacitor is disclosed including a first external terminal disposed along a first end of the capacitor, a second external terminal disposed along a second end of the capacitor opposite the first end, an active electrode region containing alternating dielectric layers and active electrode layers, and a shield electrode region including at least two shield electrodes that are spaced apart by a shield layer gap in the longitudinal direction. The distance from the active electrode region to the shield electrode region may range from about 4% to about 20% of a thickness of the capacitor between a top surface and a bottom surface opposing the top surface. The shield layer gap may range from about 3% to about 60% of an external terminal gap between the first external terminal and second external terminal in the longitudinal direction on at least one of the top or bottom surfaces.
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公开(公告)号：US11495406B2
公开(公告)日：2022-11-08
申请号：US16751299
申请日：2020-01-24
Applicant: AVX Corporation
Inventor： Marianne Berolini , Jeffrey A. Horn , Richard C. VanAlstine
Abstract: The present invention is directed to a multilayer ceramic capacitor that includes a plurality of active electrodes and at least one shield electrode that are each arranged within a monolithic body and parallel with a longitudinal direction. The capacitor may exhibit a first insertion loss value at a test frequency, which may be greater than about 2 GHz, in a first orientation relative to the mounting surface. The capacitor may exhibit a second insertion loss value at about the test frequency in a second orientation relative to the mounting surface and the capacitor is rotated 90 degrees or more about the longitudinal direction with respect to the first orientation. The longitudinal direction of the capacitor may be parallel with the mounting surface in each of the first and second orientations. The second insertion loss value may differ from the first insertion loss value by at least about 0.3 dB.
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公开(公告)号：US20220174848A1
公开(公告)日：2022-06-02
申请号：US17344059
申请日：2021-06-10
Applicant: AVX Corporation
Inventor： Kwang Choi , Marianne Berolini , Michael W. Kirk , Hector Fuentes , Jonathan C. Herr , Bryan R. Seither
Abstract: A filter assembly is disclosed that includes a monolithic filter having a surface and a heat sink coupled to the surface of the monolithic filter. The heat sink includes a layer of thermally conductive material that can have a thickness greater than about 0.02 mm. The heat sink may provide electrical shielding for the monolithic filter. In some embodiments, the filter assembly may include an organic dielectric material, such as liquid crystalline polymer or polyphenyl ether. In some embodiments, the filter assembly may include an additional monolithic filter.
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