Merged Shader for Primitive Amplification
    11.
    发明申请
    Merged Shader for Primitive Amplification 有权
    合并着色器进行原始放大

    公开(公告)号:US20090295804A1

    公开(公告)日:2009-12-03

    申请号:US12185474

    申请日:2008-08-04

    IPC分类号: G06T15/50

    CPC分类号: G06T15/005

    摘要: A method, computer program product, and system are provided for processing data in a graphics pipeline. An embodiment of the method includes processing one or more vertices of a geometric primitive with a vertex shader function and generating new primitive information for the one or more processed vertices with a geometry shader function. The geometry shader function receives one or more processed vertices from the vertex shader function and emits a single vertex associated with the new primitive information. Each emitted vertex from the geometry shader function can be stored in a memory device. Unlike conventional graphic pipelines that require a memory device for data storage during the vertex and geometry shading processes, the present invention increases efficiency in the graphics pipeline by eliminating the need to access memory when the vertex and geometry shaders process vertex information.

    摘要翻译: 提供了一种用于在图形管线中处理数据的方法,计算机程序产品和系统。 该方法的一个实施例包括使用顶点着色器功能处理几何基元的一个或多个顶点,并使用几何着色器功能为一个或多个经处理的顶点生成新的基元信息。 几何着色器功能从顶点着色器功能接收一个或多个经处理的顶点,并发出与新的基元信息相关联的单个顶点。 来自几何着色器功能的每个发出的顶点都可以存储在存储设备中。 与在顶点和几何着色处理期间需要用于数据存储的存储器件的传统图形流水线不同,本发明通过在顶点和几何着色器处理顶点信息时消除对存储器的访问来提高图形流水线的效率。

    System and method for parametric surface representation from polygonal
descriptions of arbitrary objects
    12.
    发明授权
    System and method for parametric surface representation from polygonal descriptions of arbitrary objects 失效
    用于任意对象的多边形描述的参数表面表示的系统和方法

    公开(公告)号:US5999188A

    公开(公告)日:1999-12-07

    申请号:US810256

    申请日:1997-03-03

    CPC分类号: G06T17/20

    摘要: The present invention addresses the problem of describing an arbitrary object (up to user-defined limits) given a set of triangles with vertex normals describing the object. A novel method of successively merging traingles into larger and larger patches to compute a set of "as-few-as-possible" Bezier patches is presented. This method is not only applicable to arbitrary objects, but also aims at producing as few patches as possible depending on the geometry of the input object. Also presented are methods to enforce C.sup.0 - and C.sup.1 -continuity between a pair of patches B.sub.L (s,t) and B.sub.R (s,t), placed arbitrarily. The methods perturb the appropnate control points to achieve geometric continuities. For C.sup.0 -continuity the area of the hole between the patches is minimized by formulating the area as a series of linear programs, where the continuity has to be enforced across the adjacent boundary curves B.sub.L (1,t) and B.sub.R (0,t). Similarly, to enforce C.sup.1 -continuity the hole-area in tangential space is minimized.

    摘要翻译: 本发明解决了给定一组具有描述对象的顶点法线的三角形的任意对象(直到用户定义的限制)的问题。 提出了一种将串联连续并入更大和更大的补丁以计算一组“尽可能少的”贝塞尔补丁的新颖方法。 该方法不仅适用于任意对象,而且还可以根据输入对象的几何形状尽可能少地生成补丁。 还提出了在任意放置的一对补丁BL(s,t)和BR(s,t)之间执行C0-和C1-连续性的方法。 这些方法扰乱了适当的控制点来实现几何连续性。 对于C0连续性,通过将区域配置为一系列线性程序,必须在相邻的边界曲线BL(1,t)和BR(0,t)之间执行连续性,使得补片之间的孔的面积最小化, 。 类似地,为了强制C1连续性,切向空间中的孔面积被最小化。

    Storage structures for stitching primitives in graphics processing
    13.
    发明授权
    Storage structures for stitching primitives in graphics processing 有权
    用于在图形处理中拼接图元的存储结构

    公开(公告)号:US09082204B2

    公开(公告)日:2015-07-14

    申请号:US13599747

    申请日:2012-08-30

    IPC分类号: G06T17/20 G06T1/60

    CPC分类号: G06T1/60 G06T17/20

    摘要: Techniques described in the disclosure are generally related to generating points of a domain. A tessellation unit may determine outer ring point coordinates for a point of an outer ring of the domain, and inner ring point coordinates for a point of an inner ring of the domain. The inner ring is inner to the outer ring within the domain. The tessellation unit may enqueue the inner ring point coordinates at a location of a queue, read the inner ring point coordinates from the queue, and read the outer ring point coordinates from the queue when the outer ring is not an outermost ring, where the outer ring point coordinates were previously enqueued in the queue when the outer ring was a previous inner ring. The tessellation unit may connect the inner ring coordinates and the outer ring coordinates each of which being read from the queue.

    摘要翻译: 本公开中描述的技术通常与域的生成点相关。 细分单元可以确定域的外环的点的外环点坐标,以及域的内环的点的内环点坐标。 内圈在外圈内部。 镶嵌单元可以排队队列中的内环点坐标,从队列中读取内环点坐标,当外圈不是最外圈时,从队列中读取外环点坐标,其中外圈 当外圈是先前的内圈时,戒指坐标先前排队。 该细分单元可以连接内环坐标和从队列读取的外环坐标。

    STORAGE STRUCTURES FOR STITCHING PRIMITIVES IN GRAPHICS PROCESSING
    14.
    发明申请
    STORAGE STRUCTURES FOR STITCHING PRIMITIVES IN GRAPHICS PROCESSING 有权
    用于绘图处理中的绘制原理的存储结构

    公开(公告)号:US20140063014A1

    公开(公告)日:2014-03-06

    申请号:US13599747

    申请日:2012-08-30

    IPC分类号: G06T17/20

    CPC分类号: G06T1/60 G06T17/20

    摘要: Techniques described in the disclosure are generally related to generating points of a domain. A tessellation unit may determine outer ring point coordinates for a point of an outer ring of the domain, and inner ring point coordinates for a point of an inner ring of the domain. The inner ring is inner to the outer ring within the domain. The tessellation unit may enqueue the inner ring point coordinates at a location of a queue, read the inner ring point coordinates from the queue, and read the outer ring point coordinates from the queue when the outer ring is not an outermost ring, where the outer ring point coordinates were previously enqueued in the queue when the outer ring was a previous inner ring. The tessellation unit may connect the inner ring coordinates and the outer ring coordinates each of which being read from the queue.

    摘要翻译: 本公开中描述的技术通常与域的生成点相关。 细分单元可以确定域的外环的点的外环点坐标,以及域的内环的点的内环点坐标。 内圈在外圈内部。 镶嵌单元可以排队队列中的内环点坐标,从队列中读取内环点坐标,当外圈不是最外圈时,从队列中读取外环点坐标,其中外圈 当外圈是先前的内圈时,戒指坐标先前排队。 该细分单元可以连接内环坐标和从队列读取的外环坐标。

    Method and apparatus for inviting non-rich media endpoints to join a conference sidebar session
    15.
    发明申请
    Method and apparatus for inviting non-rich media endpoints to join a conference sidebar session 有权
    邀请非富媒体终端加入会议侧栏会话的方法和装置

    公开(公告)号:US20070276908A1

    公开(公告)日:2007-11-29

    申请号:US11439311

    申请日:2006-05-23

    IPC分类号: G06F15/16

    摘要: A conferencing system and method includes, during the conference session, invoking an interactive voice response (IVR) routine that provides names of one or more conference participants to a user of an audio-only endpoint device responsive to a request from the user to create a sidebar session. An invitation to join the sidebar session is then communicated to each of one or more participants selected by the user, the invitation being communicated via a private media channel separate from a media stream associated with the conference session. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

    摘要翻译: 会议系统和方法包括在会议期间,响应于来自用户的请求创建一个或多个会话参与者的请求,该会话会话调用一个交互式语音响应(IVR)例程,其提供一个或多个会议参与者的名称, 侧边栏会话。 然后,将加入边栏会话的邀请传递给用户选择的一个或多个参与者中的每一个,邀请通过与与会议会话相关联的媒体流分开的专用媒体信道进行传送。 要强调的是,该摘要被提供以符合要求抽象的规则,允许搜索者或其他读者快速确定技术公开内容的主题。 提交它的理解是,它不会用于解释或限制权利要求的范围或含义。

    Pixel engine
    16.
    发明授权

    公开(公告)号:US06518974B2

    公开(公告)日:2003-02-11

    申请号:US09978973

    申请日:2001-10-16

    IPC分类号: G09G502

    摘要: In accordance with the present invention, the rate of change of texture addresses when mapped to individual pixels of a polygon is used to obtain the correct level of detail (LOD) map from a set of prefiltered maps. The method comprises a first determination of perspectively correct texture address values found at four corners of a predefined span or grid of pixels. Then, a linear interpolation technique is implemented to calculate a rate of change of texture addresses for pixels between the perspectively bound span corners. This linear interpolation technique is performed in both screen directions to thereby create a level of detail value for each pixel. The YUV formats described above have Y components for every pixel sample, and UN (they are also named Cr and Cb) components for every fourth sample. Every UN sample coincides with four (2×2) Y samples. This is identical to the organization of texels in U.S. Pat. No. 4,965,745 “YIQ-Based Color Cell Texturing”, incorporated herein by reference. The improvement of this algorithm is that a single 32-bit word contains four packed Y values, one value each for U and V, and optionally four one-bit Alpha components: YUV_0566: 5-bits each of four Y values, 6-bits each for U and V YUV_1544: 5-bits each of four Y values, 4-bits each for U and V, four 1-bit Alphas These components are converted from 4-, 5-, or 6-bit values to 8-bit values by the concept of color promotion. The reconstructed texels consist of Y components for every texel, and UN components repeated for every block of 2×2 texels. The combination of the YIQ-Based Color Cell Texturing concept, the packing of components into convenient 32-bit words, and color promoting the components to 8-bit values yields a compression from 96 bits down to 32 bits, or 3:1. There is a similarity between the trilinear filtering equation (performing bilinear filtering of four samples at each of two LODs, then linearly filtering those two results) and the motion compensation filtering equation (performing bilinear filtering of four samples from each of a “previous picture” and a “future picture”, then averaging those two results). Thus some of the texture filtering hardware can do double duty and perform the motion compensation filtering when those primitives are sent through the pipeline. The palette RAM area is conveniently used to store correction data (used to “correct” the predicted images that fall between the “I” images in an MPEG data stream) since, during motion compensation the texture palette memory would otherwise be unused.

    Patch-flatness test unit for high order rational surface patch rendering systems

    公开(公告)号:US06211883B1

    公开(公告)日:2001-04-03

    申请号:US08921918

    申请日:1997-08-27

    申请人: Vineet Goel

    发明人: Vineet Goel

    IPC分类号: G06T120

    CPC分类号: G06T17/20 G06T15/04

    摘要: A high order surface patch rendering system with adaptive tessellation. A patch is rendered by subdividing a patch until the subpatches are sufficiently flat that they can be approximated by a quadrilateral. To determine when a subpatch is flat enough to be approximated with a quadrilateral, the patch rendering system uses a patch flatness test unit which tests the straightness of the edges and internal curves of the subpatch. The edges and internal curves of a subpatch are determined to be straight if the intermediate control points of a curve are within a tolerance range of a straight line between the curve's endpoints. The tolerance range is chosen with respect to a pixel resolution of the final image so that subpatch is determined to be flat when the curvature of the subpatch cannot be perceived relative to a flat surface. One embodiment contemplates a flatness test unit for determining the flatness of a patch having a set of control points. The flatness test unit comprises a series of stages. The first stage is configured to receive and store the set of control points. The second stage is coupled to the first stage to receive pairs of control points and configured to determine control point coordinate differences. The third stage is coupled to the second stage to receive the control point coordinate differences and configured to determine absolute values of the control point differences. The fourth stage is coupled to the third stage to receive absolute values of the control point coordinate differences along with the control point differences and configured to determine multiplicand pairs. The fifth stage is coupled to the fourth stage to receive and multiply multiplicand pairs to determine products. The sixth stage is coupled to the fifth stage to receive products and configured to determine control point deviations and deviation tolerances. The seventh stage is coupled to the sixth stage to receive the control point deviations and deviation tolerances and configured to determine a deviation flag to indicate if the control point deviations are less than the deviation tolerances. The eighth stage is coupled to the seventh stage to receive the deviation flag and determine edge straightness and patch flatness flags.

    Patch-division unit for high-order surface patch rendering systems

    公开(公告)号:US06100894A

    公开(公告)日:2000-08-08

    申请号:US921917

    申请日:1997-08-27

    申请人: Vineet Goel

    发明人: Vineet Goel

    CPC分类号: G06T17/20 G06T15/04

    摘要: A high order surface patch rendering system with adaptive tessellation. A patch is rendered by subdividing a patch until the subpatches are sufficiently flat that they can be approximated by a quadrilateral. To subdivide a patch, the patch rendering system uses a patch division unit which accepts the control points of a patch and divides the patch in half by determining the control points of a subpatch. The relationship of the patch to it's subpatches is that of a binary tree, where every patch division produces two subpatches which may themselves be subject to patch division. In one embodiment, the patch division unit is able to traverse the binary subdivision tree in three directions (parent to left-child, left-child to right-sibling, and right-sibling to parent) to minimize memory requirements. In this embodiment the patch division unit comprises a set of curve division units. An X-curve division unit is coupled to a patch buffer to receive current X coordinates for the set of control points for the current patch, and configured to convert the current X coordinates into new X coordinates for the control points of the new patch. A Y-curve division unit is coupled to the patch buffer to receive current Y coordinates for the set of control points for the current patch, and configured to convert the current Y coordinates into new Y coordinates for the control points of the new patch. A Z-curve division unit is coupled to the patch buffer to receive current Z coordinates for the set of control points for the current patch, and configured to convert the current Z coordinates into new Z coordinates for the control points of the new patch. Each of the curve division units is further configured to receive an operation type signal and configured to generate coordinates for (a) a left subpatch if the operation type signal indicates a left child operation, (b) a right subpatch if the operation type signal indicates a right sibling operation, and (c) a parent patch if the operation type signal indicates a parent operation.

    System, method, and computer program product for a tessellation engine using a geometry shader
    19.
    发明授权
    System, method, and computer program product for a tessellation engine using a geometry shader 有权
    使用几何着色器的细分引擎的系统,方法和计算机程序产品

    公开(公告)号:US08836700B2

    公开(公告)日:2014-09-16

    申请号:US12472709

    申请日:2009-05-27

    申请人: Vineet Goel

    发明人: Vineet Goel

    CPC分类号: G06T15/005 G06T17/20

    摘要: A method, system, and computer program product are disclosed for providing tessellated primitive data to a geometry shader. The method comprises computing a set of tessellated vertices and a computed set of connectivity data based on an original set of vertices and an original set of connectivity data, generating computed vertex data based on the original set of vertices and the set of tessellated vertices, receiving the computed set of connectivity data, requesting a subset of the computed vertex data based on the computed set of connectivity data, and processing primitives defined by the subset of the computed vertex data. The system and computer program product are further disclosed for accomplishing a similar result as the aforementioned method.

    摘要翻译: 公开了用于向几何着色器提供镶嵌原始数据的方法,系统和计算机程序产品。 该方法包括基于原始的一组顶点和原始的连通性数据集来计算一组镶嵌顶点和计算的一组连通性数据,基于原始的顶点集合和镶嵌顶点的集合生成计算的顶点数据,接收 所计算的连通性数据集合,基于所计算的连通性数据集来请求计算的顶点数据的子集,以及由所计算的顶点数据的子集定义的处理原语。 进一步公开了系统和计算机程序产品,以实现与上述方法类似的结果。

    STITCHING FOR PRIMITIVES IN GRAPHICS PROCESSING
    20.
    发明申请
    STITCHING FOR PRIMITIVES IN GRAPHICS PROCESSING 有权
    绘制图形处理中的主题

    公开(公告)号:US20140063013A1

    公开(公告)日:2014-03-06

    申请号:US13599645

    申请日:2012-08-30

    IPC分类号: G06T17/20

    CPC分类号: G06T17/20 G06T15/005

    摘要: Techniques described in the disclosure are generally related to determining the manner in which to connect points that reside along an outer ring edge and an inner ring edge for purposes of tessellation. For example, a two-dimensional (2D) stitching table may define the manner in which points along the edges should be connected together to form a plurality of primitives. The techniques may index the 2D stitching table to retrieve entry values that define the manner in which the points along the edges should be connected together.

    摘要翻译: 本公开中描述的技术通常涉及确定连接沿着外环边缘和内环边缘驻留的点的方式,用于镶嵌的目的。 例如,二维(2D)缝合表可以定义沿着边缘的点应该连接在一起以形成多个图元的方式。 这些技术可能会对2D缝合表进行索引,以检索确定沿着边缘的点应连接在一起的方式的条目值。