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公开(公告)号:US12093785B2
公开(公告)日:2024-09-17
申请号:US17098248
申请日:2020-11-13
Applicant: Amazon Technologies, Inc.
Inventor: Harald Esko Jakob Putterman , Kyungjoo Noh , Christopher Chamberland , Amir Safavi-Naeini , Oskar Jon Painter , Patricio Arrangoiz Arriola
IPC: G06N10/40 , G06N10/70 , H10N60/12 , G06F30/3308
CPC classification number: G06N10/40 , G06N10/70 , H10N60/12 , G06F30/3308
Abstract: High-fidelity measurements of qubits are achieved by increasing a number of measurements taken by use of a swap operation and a readout qubit, deflating a bosonic qubit for which measurement outcomes are affected by single photon/phonon loss events, deflating a bosonic qubit enabling readout in other basis, and evolving the qubit under a Hamiltonian that couples a mode to be measured to another mode where the Hamiltonian is selected from a three wave mixing interaction, and/or a combination of these techniques.
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12.
公开(公告)号:US12007835B1
公开(公告)日:2024-06-11
申请号:US18064913
申请日:2022-12-12
Applicant: Amazon Technologies, Inc.
Inventor: Christopher Chamberland , Prithviraj Prabhu
Abstract: Techniques for performing temporally encoded lattice surgery (TELS) protocols to reduce space-time costs of lattice surgery measurements are disclosed. A given quantum algorithm may be represented using Pauli-based computation, and associated multi-qubit Pauli operators may be encoded into codewords of a given classical error-correcting code. A hybrid error detection and correction scheme may then be applied during a given TELS protocol in which classical error syndromes corresponding to errors with weights up to a certain weight limit may be corrected while other classical error syndromes corresponding to errors with higher weights may cause given lattice surgery measurements to be remeasured. The weight limit for the hybrid scheme may be chosen based, at least in part, on a number of codewords used, a size of a parallelizable Pauli set used to represent the quantum algorithm, and a distance parameter of the chosen classical error-correcting code.
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公开(公告)号:US11941483B2
公开(公告)日:2024-03-26
申请号:US17217946
申请日:2021-03-30
Applicant: Amazon Technologies, Inc.
Inventor: Connor Hann , Kyungjoo Noh , Patricio Arrangoiz Arriola , Christopher Chamberland , Fernando Brandao
Abstract: A fault tolerant quantum computer is implementing using hybrid acoustic-electric qubits. A control circuit includes an asymmetrically threaded superconducting quantum interference devices (ATS) that excites phonons in a mechanical resonator by driving a storage mode of the mechanical resonator and dissipates phonons from the mechanical resonator via an open transmission line coupled to the control circuit, wherein the open transmission line is configured to absorb photons from a dump mode of the control circuit. Filters are included in the control circuit to suppress cross-talk errors. Additionally, frequencies and pump mode detunings for respective multiplexed control circuits are strategically selected to reduce cross-talk errors.
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14.
公开(公告)号:US11580436B2
公开(公告)日:2023-02-14
申请号:US17218043
申请日:2021-03-30
Applicant: Amazon Technologies, Inc.
Inventor: Christopher Chamberland , Kyungjoo Noh , Connor Hann , Fernando Brandao
Abstract: Extra edges are added to a group of edges for use in decoding syndrome measurements of a surface code implemented using hybrid acoustic-electric qubits. The extra edges include two-dimensional cross-edges and three-dimensional space-time correlated edges that identify correlated errors arising from spurious photon dissipation processes of a multiplexed control circuit that leads to cross-talk between storage modes of a set of the mechanical resonators controlled by the given multiplexed control circuit. Additionally, error probabilities used for edge weighting incorporate error probabilities due to the spurious photon dissipation processes.
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公开(公告)号:US20220180236A1
公开(公告)日:2022-06-09
申请号:US17217946
申请日:2021-03-30
Applicant: Amazon Technologies, Inc.
Inventor: Connor Hann , Kyungjoo Noh , Patricio Arrangoiz Arriola , Christopher Chamberland , Fernando Brandao
Abstract: A fault tolerant quantum computer is implementing using hybrid acoustic-electric qubits. A control circuit includes an asymmetrically threaded superconducting quantum interference devices (ATS) that excites phonons in a mechanical resonator by driving a storage mode of the mechanical resonator and dissipates phonons from the mechanical resonator via an open transmission line coupled to the control circuit, wherein the open transmission line is configured to absorb photons from a dump mode of the control circuit. Filters are included in the control circuit to suppress cross-talk errors. Additionally, frequencies and pump mode detunings for respective multiplexed control circuits are strategically selected to reduce cross-talk errors.
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公开(公告)号:US12057859B1
公开(公告)日:2024-08-06
申请号:US17937411
申请日:2022-09-30
Applicant: Amazon Technologies, Inc.
Inventor: Christopher Chamberland , Luis Goncalves , Prasahnt Sivarajah , Eric Christopher Peterson , Sebastian Johannes Grimberg
CPC classification number: H03M13/159 , G06N10/60 , G06N10/70 , H03M13/611
Abstract: Techniques for implementing a local neural network and global decoding scheme for quantum error correction of circuit-level noise within quantum surface codes such that the decoding schemes have fast decoding throughout and low latency times for quantum algorithms are disclosed. A local neural network decoder may be pre-trained via a supervised learning technique such that the local neural network decoder may be applied for error correction in the presence of circuit-level noise in arbitrarily sized surface codes in a local decoding stage. Prior to a global decoding stage, an intermediate stage may be used to remove vertical pairs of highlighted vertices within the matching graph, which may reduce a syndrome density within the matching graph to allow for faster decoding at the global decoding stage. Such an intermediate stage may include application of a syndrome collapse or vertical cleanup technique.
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17.
公开(公告)号:US11966817B1
公开(公告)日:2024-04-23
申请号:US17694399
申请日:2022-03-14
Applicant: Amazon Technologies, Inc.
Inventor: Noah John Shutty , Christopher Chamberland
Abstract: A technique for merging, via lattice surgery, a color code and a surface code, and subsequentially decoding one or more rounds of stabilizer measurements of the merged code is disclosed. Such a technique can be applied to bottom-up fault-tolerant magic state preparation protocol such that an encoded magic state can be teleported from a color code to a surface code. Decoding the stabilizer measurements of the merged code requires a decoding algorithm specific to the merged code in which error correction involving qubits at the border between the surface and color code portions of the merged code is performed. Error correction involving qubits within the surface code portion and within color code portion, respectively, may additionally be performed. In some cases, the magic state is prepared in a color code via a technique for encoding a Clifford circuit design problem as an SMT decision problem.
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公开(公告)号:US11853159B1
公开(公告)日:2023-12-26
申请号:US17362754
申请日:2021-06-29
Applicant: Amazon Technologies, Inc.
Inventor: Christopher Chamberland , Kyungjoo Noh , Fernando Brandao
CPC classification number: G06F11/104 , G06N10/00
Abstract: A fault tolerant quantum error correction protocol is implemented for a surface code comprising Gottesman Kitaev Preskill (GKP) qubits. Analog information is determined when measuring position or momentum shifts, wherein the analog information indicates a closeness of the shift to a decision boundary. The analog information is further used to determine confidence values for error corrected measurements from the GKP qubits of the surface code. These confidence values are used to dynamically determine edge weights in a matching graph used to decode syndrome measurements of the surface code, wherein the confidence values are obtained using a maximum-likelihood decoding protocol for two-qubit gates. Space-time correlated edges and other edges are included in the matching graph and weighted based at least in part on confidence values for qubits forming the respective edges.
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公开(公告)号:US11741279B2
公开(公告)日:2023-08-29
申请号:US17098240
申请日:2020-11-13
Applicant: Amazon Technologies, Inc.
Inventor: Earl Campbell , Christopher Chamberland
IPC: G06F30/33 , H03K19/195 , G01R31/3177 , G06N10/00
CPC classification number: G06F30/33 , G01R31/3177 , G06N10/00 , H03K19/195
Abstract: A top-down distillation process for preparing low-error rate Toffoli gates utilizes Toffoli magic states as inputs to the distillation process. Multiple Toffoli magic states are used to distill a low-error rate Toffoli gate via one round of distillation. Lattice surgery operations are performed to distill the low-error rate Toffoli gate from the multiple Toffoli magic states. Each round of lattice surgery operations acts on a check qubit associated with the low error rate Toffoli gate being distilled. Errors introduced during the distillation (if non-trivial) will be manifest in the check qubit. Thus, the check qubit is measured subsequent to performing the lattice surgery operations to verify that the distilled Toffoli gate is very likely to be provide a correct result.
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20.
公开(公告)号:US20220178995A1
公开(公告)日:2022-06-09
申请号:US17218043
申请日:2021-03-30
Applicant: Amazon Technologies, Inc.
Inventor: Christopher Chamberland , Kyungjoo Noh , Connor Hann , Fernando Brandao
IPC: G01R31/3177 , G06N10/00
Abstract: Extra edges are added to a group of edges for use in decoding syndrome measurements of a surface code implemented using hybrid acoustic-electric qubits. The extra edges include two-dimensional cross-edges and three-dimensional space-time correlated edges that identify correlated errors arising from spurious photon dissipation processes of a multiplexed control circuit that leads to cross-talk between storage modes of a set of the mechanical resonators controlled by the given multiplexed control circuit. Additionally, error probabilities used for edge weighting incorporate error probabilities due to the spurious photon dissipation processes.
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