Method, data processing system, and computer program product for collecting first failure data capture information
    12.
    发明授权
    Method, data processing system, and computer program product for collecting first failure data capture information 有权
    方法,数据处理系统和计算机程序产品,用于收集第一个故障数据捕获信息

    公开(公告)号:US07308609B2

    公开(公告)日:2007-12-11

    申请号:US10821045

    申请日:2004-04-08

    IPC分类号: G06F11/00

    CPC分类号: G06F11/2268

    摘要: A method, computer program product, and a data processing system for generating a data dump in a data processing system is provided. A system boot of the data processing system is initialized. A firmware that includes fault collection logic is executed. A data dump is created in a persistent storage of the data processing system. An attempt is made to complete the system boot of the data processing system.

    摘要翻译: 提供了一种用于在数据处理系统中生成数据转储的方法,计算机程序产品和数据处理系统。 初始化数据处理系统的系统引导。 执行包含故障收集逻辑的固件。 在数据处理系统的持久存储器中创建数据转储。 尝试完成数据处理系统的系统引导。

    Staggering call stack offsets for multiple duplicate control threads
    13.
    发明授权
    Staggering call stack offsets for multiple duplicate control threads 有权
    用于多个重复控制线程的交错堆栈偏移量

    公开(公告)号:US06745288B2

    公开(公告)日:2004-06-01

    申请号:US10152431

    申请日:2002-05-21

    IPC分类号: G06F1208

    摘要: When a new control thread is initialized in a multi-thread software program, it is determined whether a like control thread has previously been instantiated. If so, a stack offset for the new control thread is set to be staggered from the stack offset for the previously instantiated like thread. By staggering the stack offsets of respective duplicate control threads, cache conflicts may be minimized.

    摘要翻译: 当在多线程软件程序中初始化新的控制线程时,确定是否先前已经实例化了类似的控制线程。 如果是这样,新的控制线程的堆栈偏移被设置为从先前实例化的类似线程的堆栈偏移量交错。 通过交错各个重复控制线程的堆栈偏移,缓存冲突可能被最小化。

    Computer program product and method for partial paging and eviction of microprocessor instructions in an embedded computer
    14.
    发明授权
    Computer program product and method for partial paging and eviction of microprocessor instructions in an embedded computer 有权
    用于在嵌入式计算机中部分寻呼和驱逐微处理器指令的计算机程序产品和方法

    公开(公告)号:US06581142B1

    公开(公告)日:2003-06-17

    申请号:US09653673

    申请日:2000-09-01

    IPC分类号: G06F1208

    摘要: A method and computer program product are provided for partial paging and eviction of microprocessor instructions. Responsive to an instruction page fault, a predefined algorithm is applied to a virtual page address for the identified instruction page fault to identify a page table entry group within a volatile memory. Next, searching an identified page table entry group for a free or open page table entry is performed. Responsive to an identified open page table entry, a partial page is copied from a non-volatile memory to a corresponding partial page within the volatile memory. Responsive to failing to identify an open page table entry, a virtual page residing within the volatile memory is selected for eviction based upon at least one of determining which virtual page, of all virtual pages residing in the volatile memory and within the identified page table entry group, has been evicted a fewest number of times; which virtual page has fewest partial pages resident, and which virtual page has been resident longest.

    摘要翻译: 提供了一种方法和计算机程序产品,用于部分寻呼和驱逐微处理器指令。 响应于指令页错误,预定义的算法被应用于所识别的指令页错误的虚拟页地址以识别易失性存储器内的页表条目组。 接下来,执行搜索标识页表条目组以获得空闲或打开的页表项。 响应于所识别的开放页表项,部分页面从非易失性存储器复制到易失性存储器内的对应的部分页面。 响应于不能识别开放页表项,基于至少一个确定哪个虚拟页面驻留在易失性存储器中的所有虚拟页面中以及在所识别的页表项目中的至少一个来选择驻留在易失性存储器内的虚拟页面 集团,已被驱逐次数最少; 哪个虚拟页面驻留的部分页面最少,哪个虚拟页面驻留的时间最长。

    Method and profiling cache for management of virtual memory
    15.
    发明授权
    Method and profiling cache for management of virtual memory 失效
    用于管理虚拟内存的方法和概要缓存

    公开(公告)号:US07089396B2

    公开(公告)日:2006-08-08

    申请号:US10268474

    申请日:2002-10-10

    IPC分类号: G06F12/00

    CPC分类号: G06F12/127 G06F12/123

    摘要: A method and profiling cache for management of virtual memory includes a set of entries stored in the profiling cache. Each entry of the set of entries includes a page address, a time stamp for the page address and a least recently used (LRU) count; and the LRU count is updated for each access of the page address. Entries in the profiling cache are cast out using the LRU counts. A translation lookaside buffer (TLB) includes a first TLB section for storing a plurality of temporarily pinned entries and a second TLB section for storing a plurality of non-pinned entries. Responsive to a TLB interrupt, an entry is loaded in the second TLB section using a first in first out algorithm for replacing the non-pinned entries. The first TLB portion is periodically updated utilizing identified ones of the set of entries in the profiling cache having oldest time stamps.

    摘要翻译: 用于管理虚拟存储器的方法和分析高速缓存包括存储在分析高速缓存中的一组条目。 该组条目的每个条目包括页面地址,页面地址的时间戳和最近最少使用的(LRU)计数; 并且更新页面地址的每个访问的LRU计数。 概要分析缓存中的条目将使用LRU计数进行舍弃。 翻译后备缓冲器(TLB)包括用于存储多个临时固定条目的第一TLB部分和用于存储多个非固定条目的第二TLB部分。 响应于TLB中断,在第二TLB部分中使用先入先出算法来替换非固定条目来加载条目。 使用具有最早时间戳的分析缓存中的一组条目来周期性地更新第一TLB部分。

    Method, apparatus and computer program product for dynamically minimizing translation lookaside buffer entries across contiguous memory
    16.
    发明授权
    Method, apparatus and computer program product for dynamically minimizing translation lookaside buffer entries across contiguous memory 失效
    方法,装置和计算机程序产品,用于动态地最小化横跨连续存储器的翻译后备缓冲区条目

    公开(公告)号:US07003647B2

    公开(公告)日:2006-02-21

    申请号:US10422662

    申请日:2003-04-24

    IPC分类号: G06F12/00

    摘要: A method, apparatus and computer program product are provided for dynamically minimizing translation lookaside buffer (TLB) entries across contiguous memory. A page table with page table entries (PTEs) is provided for mapping multiple sized pages from a virtual address space to a physical address space. Each of the multiple sized pages is a multiple of a base page size. A region of memory having a starting address and a length is divided into a minimum number of natural blocks for the memory region. Once the region of memory is divided into the natural blocks, page table entries (PTEs) are assigned to map each natural block. Multiple identical PTEs are required to map each natural block greater than a base page size. Only one TLB entry is used to map each natural block.

    摘要翻译: 提供了一种方法,装置和计算机程序产品,用于动态地最小化横跨连续存储器的翻译后备缓冲器(TLB)条目。 提供了具有页表条目(PTE)的页表,用于将多个大小的页面从虚拟地址空间映射到物理地址空间。 多个大小的页面中的每一个是基页大小的倍数。 具有开始地址和长度的存储器区域被划分为存储区域的最小数量的自然块。 一旦存储器区域被分为自然块,则分配页表项(PTE)以映射每个自然块。 需要多个相同的PTE来映射大于基页大小的每个自然块。 只有一个TLB条目用于映射每个自然块。

    Method of allocating physical memory space having pinned and non-pinned regions
    17.
    发明授权
    Method of allocating physical memory space having pinned and non-pinned regions 失效
    分配具有固定和非固定区域的物理存储器空间的方法

    公开(公告)号:US06922765B2

    公开(公告)日:2005-07-26

    申请号:US09886817

    申请日:2001-06-21

    IPC分类号: G06F12/02 G06F12/12 G06F12/00

    CPC分类号: G06F12/023 G06F12/126

    摘要: In a physical memory space, a pinned memory region is defined at one end of the space and a non-pinned region is defined at the other end of the space. A free region is between the pinned and non-pinned regions. Requests for pinned memory allocations are satisfied either by using holes in the pinned region or by appending the requested block to the end of the pinned region in the free region. The free region may be widened to accommodate pinned memory allocations. Requests for non-pinned memory allocations are satisfied by holes in the non-pinned region, by being appended to the non-pinned region in the free region or by filling holes in the pinned region, in that order.

    摘要翻译: 在物理存储器空间中,固定存储器区域被限定在该空间的一端,并且在该空间的另一端限定非固定区域。 自由区域在固定区域和非固定区域之间。 通过在固定区域中使用孔或通过将所请求的块附加到自由区域中的固定区域的末端来满足针对固定存储器分配的请求。 可以扩大自由区域以适应固定的内存分配。 非固定存储器分配的请求由未钉住区域中的孔通过附加到自由区域中的非固定区域或按照该顺序填充固定区域中的孔来满足。

    Service processor reset/reload
    18.
    发明授权
    Service processor reset/reload 失效
    服务处理器重置/重新加载

    公开(公告)号:US06742139B1

    公开(公告)日:2004-05-25

    申请号:US09692339

    申请日:2000-10-19

    IPC分类号: G06F1120

    CPC分类号: G06F11/0724 G06F11/0793

    摘要: A method, system, and apparatus for reestablishing communications between a host and a service processor after the service processor has ceased to function correctly is provided. In one embodiment, the host exchanges heartbeat signals with the service processor. The heartbeat signals indicate that the service processor is active and functioning. In response to a failure to receive a heartbeat signal or in response to some other indication that the service processor is not performing correctly, the host causes a hard reset of the service processor. In addition, the service processor can detect a failure within itself and initiate a hard reset to itself. After the hard reset, the service processor returns to a monitoring mode without performing initial tests of the data processing system. Furthermore, the data processing system remains active and is not shut down during the hard reset of the service processor.

    摘要翻译: 提供了一种用于在服务处理器不能正常工作之后重新建立主机与服务处理器之间的通信的方法,系统和装置。 在一个实施例中,主机与服务处理器交换心跳信号。 心跳信号表示服务处理器处于活动状态并且正常运行。 响应于不能接收心跳信号或响应于服务处理器不能正确执行的某些其它指示,主机引起服务处理器的硬复位。 此外,服务处理器可以检测自身内的故障,并对自身进行硬复位。 在硬复位之后,服务处理器返回到监视模式,而不执行数据处理系统的初始测试。 此外,数据处理系统保持活动状态,并且在服务处理器的硬复位期间不被关闭。