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公开(公告)号:US20240274073A1
公开(公告)日:2024-08-15
申请号:US18021955
申请日:2022-06-30
Applicant: BOE Technology Group Co., Ltd.
Inventor: Xuliang Zhao , Lujiang Huangfu , Jianchao Zhu
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2310/08 , G09G2320/0247 , G09G2340/0435
Abstract: The present application provides a pixel driving circuit, a control method thereof, and a display device, which relates to the technical field of display. The pixel driving circuit is configured to drive a light emitting diode to emit light at different refresh rates, and includes: a first control module, a second control module, a compensation module, a refresh module, a first reset module, a first light emitting control module, a driving module, and a second light emitting control module. By holding potentials of a first node and a second node, the pixel driving circuit according to the present application may operate at different refresh rates, and the problem of insufficient Vth capture time is effectively solved.
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12.
公开(公告)号:US11688343B2
公开(公告)日:2023-06-27
申请号:US17626474
申请日:2021-01-27
Applicant: BOE Technology Group Co., Ltd.
Inventor: Can Zheng , Jianchao Zhu , Lujiang Huangfu , Libin Liu , Shiming Shi
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/043 , G09G2300/0426 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2310/0297 , G09G2310/08 , G09G2320/0242 , G09G2320/0257 , G09G2320/045 , G09G2330/021
Abstract: In a pixel driving circuit, a compensation sub-circuit is respectively coupled to a first control terminal, a control terminal and a second terminal of the driving sub-circuit; a first terminal of the first coupling sub-circuit is coupled to the control terminal of the driving sub-circuit; a first terminal of the second coupling sub-circuit is coupled to a second terminal of the first coupling sub-circuit; a first reset sub-circuit is respectively coupled to a second control terminal, the control terminal of the driving sub-circuit and an initialization signal output terminal; a second reset sub-circuit is respectively coupled to a third control terminal, a second terminal of the first coupling sub-circuit and the first level signal output terminal; a first light emitting control sub-circuit is respectively coupled to a light emitting control terminal, a second terminal of the second coupling sub-circuit and a reference signal output terminal.
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公开(公告)号:US10909920B2
公开(公告)日:2021-02-02
申请号:US16309203
申请日:2018-03-20
Inventor: Jianchao Zhu , Lujiang Huangfu , Yunfei Li , Can Zheng , Libin Liu , Yipeng Chen
IPC: G09G3/3233 , G09G3/3266
Abstract: A pixel driving circuit and a driving method, and a display device are provided. The driving circuit includes: a first switching element, a second switching element, a third switching element, a fourth switching element, a fifth switching element, a driving transistor, a sixth switching element, a first storage capacitor and a second storage capacitor.
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公开(公告)号:US09799272B2
公开(公告)日:2017-10-24
申请号:US15320613
申请日:2016-02-05
Inventor: Yi Zhang , Yu Feng , Jianchao Zhu
IPC: G09G3/3266 , G09G3/325 , G11C19/28
CPC classification number: G09G3/3266 , G09G3/325 , G09G2300/0809 , G09G2310/0286 , G11C19/28 , G11C19/287
Abstract: There are provided a shift register, a gate driving circuit and a relevant display device, comprising a first node controlling module (1), a second node controlling module (2), a third node controlling module (3), a first outputting module (4) and a second outputting module (5). The first node controlling module (1) adjust a potential of a first node (A), the second node controlling module (2) adjust a potential of a second node (B), the third node controlling module (3) adjust a potential of a third node (C), the first outputting module (4) adjust a potential of a driving signal output terminal (Output), and the second outputting module (5) adjusts the potential of the driving signal output terminal (Output). Through mutual coordination of the five modules, the shift register could control a time length of a scanning signal outputted by the driving signal output terminal (Output) by only changing a time length of an input signal (Input), without changing clock signals (CK,CB) and changing the circuit and process, so that difficulty of the gate driving circuit and complexity of process could be reduced, thereby the cost is reduced.
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公开(公告)号:US12295212B2
公开(公告)日:2025-05-06
申请号:US17353927
申请日:2021-06-22
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Jianchao Zhu
IPC: H10K59/122 , H10K59/124 , H10K59/131 , H10K59/80 , H10K71/00 , H10K59/12
Abstract: A display panel, a display device, and a method of manufacturing the display panel is disclosed. The display panel includes a plurality of sub-pixel units, each sub-pixel unit includes a first metal layer, a first planarization layer, a first electrode layer, a pixel definition layer, a light-emitting layer, and a second electrode layer that are sequentially stacked in this order, wherein the first metal layer comprises at least one longitudinal wire, the first metal layer, the pixel definition layer, the first electrode layer, and the second electrode layer employ an axial symmetry structure respectively; when the number of the longitudinal wires is odd, a longitudinal wire at center is taken as a symmetry axis of the axial symmetry structure; and when the number of the longitudinal wires is even, a center line between two longitudinal wires at outermost edges is taken as the symmetry axis of the axial symmetry structure.
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公开(公告)号:US12262607B2
公开(公告)日:2025-03-25
申请号:US17631372
申请日:2021-02-20
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Qian Yang , Jianchao Zhu , Bo Wang , Jingquan Wang
IPC: H10K59/131 , G09F9/30 , H10K77/10
Abstract: A stretchable display panel has a plurality of island regions and a plurality of bridge regions. The island regions are arranged in an array. Every two adjacent island regions are connected with a bridge region in the bridge regions therebetween. The display panel includes a plurality of sub-pixels and a plurality of signal line groups. At least one sub-pixel is provided in each island region. The signal line groups are located in a same conductive layer. Each signal line group extends along bridge regions to island regions that are connected to the bridge regions. The signal line group includes a plurality of signal lines arranged in parallel and at intervals. Each signal line is electrically connected to sub-pixels in the island regions.
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公开(公告)号:US12190816B2
公开(公告)日:2025-01-07
申请号:US18556403
申请日:2023-01-29
Applicant: BOE Technology Group Co., Ltd.
Inventor: Yu Feng , Jianchao Zhu
IPC: G09G3/3233 , H10K59/131
Abstract: Provided are a display substrate, a display panel, and a display device. The display substrate includes a base substrate, pixel circuits, groups of data lines, and first power lines. At least one column of pixel circuits is electrically connected to at least one group of data lines and includes first and second pixel circuits alternately arranged in the second direction. The at least one group of data lines includes first and second data lines. For the at least one column of pixel circuits, input transistors of first and second pixel circuits are electrically connected to first and second data lines, respectively. In the first direction, the first data line, the first power line and the second data line are arranged in sequence, and input transistors of first and second pixel circuits are respectively located on a side of the first power line close to the first and second data line.
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18.
公开(公告)号:US20230343285A1
公开(公告)日:2023-10-26
申请号:US17764395
申请日:2021-03-18
Applicant: BOE Technology Group Co., Ltd.
Inventor: Jiangnan Lu , Guangliang Shang , Xinshe Yin , Libin Liu , Jianchao Zhu , Hao Zhang , Ke Feng
IPC: G09G3/3233 , G11C19/28
CPC classification number: G09G3/3233 , G11C19/28 , G09G2310/0286 , G09G2300/0842 , G09G2310/08
Abstract: A shift register unit, a driving method thereof, a gate driving circuit and a display panel are provided. The shift register unit includes an input circuit, a reset circuit, a first output circuit and a second output circuit; the input circuit is configured to control a level of a first node in response to a first input signal; the reset circuit is configured to reset the first node in response to a reset signal; the first output circuit is configured to output a shift signal under control of the level of the first node; and the second output circuit is configured to, in a first phase, under control of the level of the first node, output a plurality of sub-pulses at the first output terminal as a first output signal in a case where the shift output terminal outputs a first level of the shift signal.
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19.
公开(公告)号:US11354927B2
公开(公告)日:2022-06-07
申请号:US16472438
申请日:2018-12-06
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Jianchao Zhu , Libin Liu
IPC: G06K9/00 , G06V40/13 , G06V10/147 , H01L27/32 , H01L51/56
Abstract: A fingerprint identification device, a display panel, a fabrication method thereof, and a display device are disclosed. The fingerprint identification device includes a fingerprint sensor, an aperture diaphragm, and a first shielding structure. The fingerprint sensor includes a plurality of sensing units; the aperture diaphragm is on a light incident side of the fingerprint sensor and includes an aperture through which light is allowed to be incident on at least one sensing unit of the fingerprint sensor; and the first shielding structure is on a side of the aperture diaphragm facing away from the fingerprint sensor, and surrounds at least a portion of the aperture.
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20.
公开(公告)号:US20200035166A1
公开(公告)日:2020-01-30
申请号:US16398762
申请日:2019-04-30
Applicant: BOE Technology Group Co., Ltd.
Inventor: Jianchao Zhu , Libin Liu
IPC: G09G3/3266 , G11C19/28
Abstract: The embodiments of the present disclosure disclose a gate driving circuit. The gate driving circuit includes at least one stage of shift register unit to be compensated, wherein a driving terminal of each stage of shift register unit to be compensated is connected to a gate line of a corresponding row of pixels to be compensated, and at least one stage of parasitics compensation circuit, wherein each stage of parasitics compensation circuit is connected in series between a power supply line and a driving terminal of a corresponding shift register unit to be compensated. Each stage of parasitics compensation circuit is configured to compensate a driving terminal of a corresponding shift register unit to be compensated for parasitic capacitance and/or parasitic resistance, so that respective stages of shift register units to be compensated have the same driving load.
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