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公开(公告)号:US20230371319A1
公开(公告)日:2023-11-16
申请号:US18223660
申请日:2023-07-19
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
IPC: H10K59/126 , H10K59/131 , H10K59/121
CPC classification number: H10K59/126 , H10K59/1213 , H10K59/131 , H01L27/124
Abstract: The present disclosure provides a display substrate, a display panel including the display substrate, and an electronic device. The display substrate includes: a base substrate; a transistor on the base substrate, wherein the transistor includes a first gate layer; a signal line located on the base substrate and configured to transmit an electrical signal; and a conductive isolation portion located between the transistor and the signal line adjacent to the transistor in a direction parallel to the base substrate, wherein the conductive isolation portion is electrically connected with a DC source signal on the display substrate.
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公开(公告)号:US20200168692A1
公开(公告)日:2020-05-28
申请号:US16630496
申请日:2018-12-27
Applicant: BOE Technology Group Co., Ltd.
Inventor: Libin Liu , Qian Yang , Hongli Wang , Lujiang Huangfu
IPC: H01L27/32
Abstract: A display substrate and a display device are disclosed. The display substrate (10) includes a plurality of repeating units (100), a plurality of primary signal lines (21) and an auxiliary signal line (22). Each of the repeating units (100) includes a first sub-pixel (R1), a second sub-pixel (B1) and two third sub-pixels (G1, G2). The two third sub-pixels (G1, G2) are located between two adjacent primary signal lines (21). In each of the repeating units (100), the first sub-pixel (R1) and the second sub-pixel (B1) are arranged in a first direction (X), and the two third sub-pixels (G1, G2) are arranged in a second direction (Y). The first direction (X) and the second direction (Y) are different directions. At least one auxiliary signal line (22) is disposed between the two adjacent primary signal lines (21). Two ends of the auxiliary signal line (22) are respectively connected to the two adjacent primary signal lines (21). The two third sub-pixels (G1, G2) are respectively located on two sides of the auxiliary signal line (22).
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公开(公告)号:US12058910B2
公开(公告)日:2024-08-06
申请号:US17551341
申请日:2021-12-15
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Lujiang Huangfu , Xiaodan Jin , Yinan Liang , Zhenzhen Li , Wenjing Tan , Libin Liu , Qian Yang , Hongli Wang
IPC: H10K59/35 , G02F1/1343 , G09G3/20 , H10K59/122
CPC classification number: H10K59/353 , G02F1/134345 , G09G3/2003 , G02F2201/52 , G09G2300/0452 , H10K59/122
Abstract: A display substrate including a first display area including a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels, wherein the display substrate includes a plurality of first pixel groups each of which includes two third sub-pixels, one first sub-pixel and one second sub-pixel, the two third sub-pixels are arranged adjacent to each other along a first direction, the one first sub-pixel and the one second sub-pixel are adjacent to at least one of the two third sub-pixels, located on both sides of a straight line passing centers of the two third sub-pixels, and arranged along a second direction different from the first direction; a size of the first sub-pixel and the second sub-pixel in the second direction is smaller than a size of the first sub-pixel and the second sub-pixel in the first direction, respectively.
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公开(公告)号:US11462591B2
公开(公告)日:2022-10-04
申请号:US16622045
申请日:2018-12-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Libin Liu , Qian Yang , Hongli Wang , Lujiang Huangfu
Abstract: A display substrate and a display device. The display substrate comprises a first sub-pixel (111), a second sub-pixel (112), and a first spacer (0101). A line connecting the center (C1) of the first sub-pixel (111) and the center (C2) of the second sub-pixel (112) is a center line (CL1); the center line (CL1) is not perpendicular to a first direction (X); the first direction (X) is at least one of the row direction or the column direction. The first spacer (0101) is disposed between the first sub-pixel (111) and the second sub-pixel (112), and the extension direction (E01) of first spacer (0101) between the first sub-pixel (111) and the second sub-pixel (112) is not perpendicular to the first direction (X). Therefore, the display substrate can improve the different viewing angle color cast and improve the display quality.
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公开(公告)号:US11417826B2
公开(公告)日:2022-08-16
申请号:US16609296
申请日:2019-05-17
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
IPC: G09G5/00 , H01L41/113 , H01L41/047 , G06F3/041 , G06V40/13
Abstract: The embodiments of the present disclosure disclose an ultrasonic sensor, a manufacturing method thereof, and a display device. The ultrasonic sensor includes a substrate and at least one sensor component located on the substrate. The sensor component includes a first electrode, a second electrode, and a piezoelectric layer located between the first electrode and the second electrode. The substrate is provided with a groove on a side close to the sensor component, and the orthographic projection of the piezoelectric layer on the substrate has a portion overlapping with a region of the groove in the substrate.
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公开(公告)号:US11315491B2
公开(公告)日:2022-04-26
申请号:US16500747
申请日:2019-05-13
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Qian Yang , Libin Liu , Qiang Wang
IPC: G09G3/3258 , G09G3/3266 , G09G3/3275 , G06V40/13
Abstract: A pixel circuit, a display panel, and a driving method. The pixel circuit includes a data writing circuit, an ultrasonic acquiring and converting circuit, a storage circuit, a driving circuit, an output control circuit, and a light emitting device. The ultrasonic acquiring and converting circuit converts a received ultrasonic signal into a converted electrical signal, and provides the converted electrical signal to the data writing circuit; the data writing circuit provides the converted electrical signal or a data signal to a first node; the driving circuit provides a recognition signal obtained according to the converted electrical signal or a driving signal to the fourth node; the storage circuit maintains a voltage difference between the first node and the second node stable; the output control circuit provides a level of the fourth node to a third node; the third node outputs the recognition signal.
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公开(公告)号:US11114005B2
公开(公告)日:2021-09-07
申请号:US16623989
申请日:2019-07-23
Applicant: BOE Technology Group Co., Ltd.
IPC: G09G3/20
Abstract: A pixel structure is disclosed. The pixel structure includes: a plurality of scanning lines; a plurality of data lines intersecting the plurality of scanning lines; and a plurality of sub-pixels which are located at respective intersections of the plurality of scanning lines and the plurality of data lines and are arranged in rows and columns. (4n+1)th and (4n+2)th data lines of the plurality of data lines are located on opposite sides of a (2n+1)th column of sub-pixels respectively. (4n+3)th and (4n+4)th data lines of the plurality of data lines are located on opposite sides of a (2n+2)th column of sub-pixels respectively. The (4n+2)th and (4n+3)th data lines of the plurality of data lines are located between the (2n+1)th column of sub-pixels and the (2n+2)th column of sub-pixels, where n is an integer greater than or equal to 0.
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公开(公告)号:US12262607B2
公开(公告)日:2025-03-25
申请号:US17631372
申请日:2021-02-20
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Qian Yang , Jianchao Zhu , Bo Wang , Jingquan Wang
IPC: H10K59/131 , G09F9/30 , H10K77/10
Abstract: A stretchable display panel has a plurality of island regions and a plurality of bridge regions. The island regions are arranged in an array. Every two adjacent island regions are connected with a bridge region in the bridge regions therebetween. The display panel includes a plurality of sub-pixels and a plurality of signal line groups. At least one sub-pixel is provided in each island region. The signal line groups are located in a same conductive layer. Each signal line group extends along bridge regions to island regions that are connected to the bridge regions. The signal line group includes a plurality of signal lines arranged in parallel and at intervals. Each signal line is electrically connected to sub-pixels in the island regions.
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公开(公告)号:US11765943B2
公开(公告)日:2023-09-19
申请号:US17281606
申请日:2020-05-08
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Qian Yang , Lujiang Huangfu , Libin Liu
CPC classification number: H10K59/122 , G03F1/00 , G03F1/38 , H10K59/351 , H10K59/352 , H10K59/353 , H10K71/00 , H10K59/1201
Abstract: Provided are an array substrate and a manufacturing method therefor, a display device, and a mask plate. The array substrate includes a pixel defining layer having a first opening, a second opening, and a third opening passing through the pixel defining layer. Every two of the first to third openings are adjacent to each other. The pixel defining layer includes first to third opening denning portions. At least one of the ratio of the slope angle of a portion of the first opening defining portion located between the first opening and the second opening to the slope angle of the third opening defining portion, and the ratio of the slope angle of a portion of the second opening defining portion located between the first opening and the second opening to the slope angle of the third opening defining portion is from 0.8 to 1.25.
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公开(公告)号:US11749202B2
公开(公告)日:2023-09-05
申请号:US17638892
申请日:2021-04-20
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Qian Yang
IPC: G09G3/3258 , G09G3/3291
CPC classification number: G09G3/3258 , G09G3/3291 , G09G2300/0819
Abstract: A pixel driving circuit comprises a data writing circuit, a driving circuit, a light emitting control circuit, a compensation circuit and a storage circuit, the data writing circuit is coupled to the driving circuit, for writing a data signal into the driving circuit; the driving circuit is coupled to a first power source end and a light-emitting sub-circuit through the light emitting control circuit, for inputting, under control of the light emitting control circuit, driving current into the light-emitting sub-circuit according to the data signal; the compensation circuit is coupled to the driving circuit; the storage circuit is coupled between the first power source end and the driving circuit; and the data writing circuit and the compensation circuit includes at least two transistors, wherein in the data write circuit and the compensation circuit, at least one transistor is a low-temperature polysilicon transistor, and at least one transistor is an oxide transistor.
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