Abstract:
The present disclosure provides an image processing method and device, and a display device. The image processing method comprises: acquiring an image brightness information; obtaining a gray scale compensation parameter of at least two band points of each first sub-image area according to brightness information and reference brightness of the at least two band points comprised in the brightness information of each first sub-image area of the image brightness information; obtaining the gray scale compensation information of each first sub-image area according to the gray scale compensation parameters of the at least two band points; and compensating the gray scale of the image according to the gray scale information of the M of first sub-image areas.
Abstract:
A display substrate including a first display area including a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels, wherein the display substrate includes a plurality of first pixel groups each of which includes two third sub-pixels, one first sub-pixel and one second sub-pixel, the two third sub-pixels are arranged adjacent to each other along a first direction, the one first sub-pixel and the one second sub-pixel are adjacent to at least one of the two third sub-pixels, located on both sides of a straight line passing centers of the two third sub-pixels, and arranged along a second direction different from the first direction; a size of the first sub-pixel and the second sub-pixel in the second direction is smaller than a size of the first sub-pixel and the second sub-pixel in the first direction, respectively.
Abstract:
A pixel arrangement structure, a display substrate, and a display device. The pixel arrangement structure comprises pixel groups (10) extending in a first direction and arranged in a second direction, and each pixel group (10) comprises a first sub-pixel row (100), a second sub-pixel row (200), and a third sub-pixel row (300). The first sub-pixel row (100) comprises a plurality of first sub-pixels (110), the second sub-pixel row (200) comprises a plurality of second sub-pixel pairs (210), and the third sub-pixel row (300) comprises a plurality of third sub-pixels (310). The pitches of the plurality of first sub-pixels (110), the plurality of second sub-pixel pairs (210), and the plurality of third sub-pixels (310) in the first direction are same. In each pixel group (10), a line connecting the centers of a first sub-pixel (110) and a third sub-pixel (310) adjacent to each other are substantially parallel to the second direction, and the first sub-pixel row (100) and the second sub-pixel row (200) are shifted by one half of the pitch in the first direction. The orthographic projections of a second sub-pixel pair (210) and a first sub-pixel (110) adjacent to each other on a straight line extending in the first direction are overlapped, and the first sub-pixel rows (100) in the two adjacent pixel groups (10) are shifted by one-half of the pitch in the first direction. The pixel arrangement structure reduces the grainy sensation of the second sub-pixel pairs during display.
Abstract:
The pixel structure includes a plurality of first pixel units disposed in a first region and at least one second pixel unit disposed in a second region. A distribution density of the plurality of first pixel units is greater than that of the at least one second pixel unit. Each first pixel unit includes a plurality of first sub-pixels, and each second pixel unit includes a plurality of second sub-pixels. A number of first sub-pixels included in the first pixel unit is equal to that of second sub-pixels included in the second pixel unit. A number of at least one first sub-pixel of the first pixel unit that displays a color is equal to that of at least one second sub-pixel of the second pixel unit that displays a same color, and light-emitting areas of a first sub-pixel and a second sub-pixel that display a same color are equal.
Abstract:
A pixel arrangement structure, including a plurality of repeating units, wherein each of the plurality of repeating units includes one first sub-pixel, one second sub-pixel, and two third sub-pixels; in each of the plurality of repeating units, the two third sub-pixels are arranged in one of a first direction and a second direction, and the first sub-pixel and the second sub-pixel are arranged in the other one of the first direction and the second direction; the plurality of repeating units are arranged in the first direction to form a plurality of repeating unit groups, the plurality of repeating unit groups are arranged in the second direction; and the first direction and the second direction are different directions.
Abstract:
A pixel arrangement structure, including a plurality of repeating units, wherein each of the plurality of repeating units includes one first sub-pixel, one second sub-pixel, and two third sub-pixels; in each of the plurality of repeating units, the two third sub-pixels are arranged in one of a first direction and a second direction, and the first sub-pixel and the second sub-pixel are arranged in the other one of the first direction and the second direction; the plurality of repeating units are arranged in the first direction to form a plurality of repeating unit groups, the plurality of repeating unit groups are arranged in the second direction; and the first direction and the second direction are different directions.
Abstract:
A circuit structure includes: a control circuit, including a first end, a second end and a control end; a switching circuit, including a first interface, a second interface and a control interface; a driving power line, connected with the control end of the control circuit and configured to provide a driving power voltage in a working stage to conduct the first end of the control circuit and the second end of the control circuit; and a first voltage line, connected with the first end of the control circuit and configured to, when the first end of the control circuit and the second end of the control circuit are conducted, provide a first voltage to the control interface of the switching circuit through the control circuit to disconnect the first interface of the switching circuit from the second interface of the switching circuit.
Abstract:
The present invention discloses a position calibration method, a test circuit board, a sample panel and a position calibration apparatus. The position calibration method comprises: Step S1, providing a test circuit board and forming at least one first sample connecting finger; Step S2, making a sample panel comprising second sample connecting fingers corresponding to each first sample connecting finger; Step S3, bringing the test circuit board into contact with the sample panel; and Step S4, detecting whether each first sample connecting finger is electrically connected to a corresponding second sample connecting finger, and when any one of the first sample connecting fingers is detected as in disconnection with the corresponding second sample connecting finger, adjusting a position of the test circuit board and/or the sample panel.