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公开(公告)号:US20240290260A1
公开(公告)日:2024-08-29
申请号:US18043467
申请日:2022-02-24
发明人: Guangliang SHANG , Li WANG , Baoyun WU , Xiyu ZHAO , Yu FENG , Libin LIU , Shiming SHI
IPC分类号: G09G3/3233
CPC分类号: G09G3/3233 , G09G2310/08 , G09G2320/0247 , G09G2320/0271 , G09G2330/021
摘要: A parameter adjustment method of a display module includes: setting an initial value of a light-emitting delay time and specified gray levels; based on the initial value of the light-emitting delay time, adjusting the light-emitting delay time stepwise until a value of an adjusted light-emitting delay time exceeds a preset range of the light-emitting delay time, so that values of the light-emitting delay time within the preset range of the light-emitting delay time are obtained; obtaining flicker values of the display module at the specified gray levels for each value of the light-emitting delay time; and determining a preferred value of the light-emitting delay time from the values of the light-emitting delay time according to flicker values corresponding to the values of the light-emitting delay time.
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公开(公告)号:US20240290244A1
公开(公告)日:2024-08-29
申请号:US18655073
申请日:2024-05-03
发明人: Tian DONG , Can ZHENG , Li WANG , Long HAN , Yu FENG , Hao ZHANG , Jiangnan LU , Jie ZHANG , Bo WANG , Jingquan WANG
IPC分类号: G09G3/20
CPC分类号: G09G3/2092 , G09G2310/0297 , G09G2310/061
摘要: The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.
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公开(公告)号:US20240105119A1
公开(公告)日:2024-03-28
申请号:US17637815
申请日:2021-04-23
发明人: Libin LIU , Li WANG , Guangliang SHANG , Yu FENG , Long HAN , Baoyun WU , Shiming SHI
IPC分类号: G09G3/3233
CPC分类号: G09G3/3233 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2320/0233 , G09G2340/0435
摘要: A pixel circuit, a driving method therefor and a display apparatus are provided. The pixel circuit includes a driving sub-circuit, a write sub-circuit, a compensation sub-circuit, a reset sub-circuit, a first light-emitting control sub-circuit, a second light-emitting control sub-circuit, a leak-proof sub-circuit, a storage sub-circuit and a light-emitting element. The reset sub-circuit is configured to reset a fourth node under control of a signal of a light-emitting control signal terminal and reset a fifth node under control of a signal of a reset control signal terminal. The compensation sub-circuit is configured to compensate a threshold voltage of the driving sub-circuit to the fifth node under the control of a signal of a first scanning signal terminal. The leak-proof sub-circuit is configured to write a signal of the fifth node into a first node under control of a signal of a second scanning signal terminal.
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公开(公告)号:US20230180551A1
公开(公告)日:2023-06-08
申请号:US17923934
申请日:2021-11-04
发明人: Jiangnan LU , Libin LIU , Guangliang SHANG , Long HAN , Yu FENG , Li WANG , Mei LI
IPC分类号: H10K59/131 , H10K59/12
CPC分类号: H10K59/131 , H10K59/1201 , H10K59/124
摘要: A display panel includes: a substrate; at least one first signal line disposed on the substrate and located in a peripheral region; at least one second signal line disposed on the substrate and located in the peripheral region; an insulating layer covering the at least one first signal line and the at least one second signal line; and a shielding signal line covering the at least one groove. The at least one second signal line and the at least one first signal line are arranged in a same layer. A surface of the insulating layer away from the substrate has at least one groove. An orthogonal projection, on the substrate, of a bottom surface of a groove is located between orthogonal projections, on the substrate, of a first signal line and a second signal line.
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公开(公告)号:US20230163200A1
公开(公告)日:2023-05-25
申请号:US17771720
申请日:2021-03-08
发明人: Xinguo WU , Fengguo WANG , Liang TIAN , Yu FENG , Bin LIU , Chenglong WANG , Yuxuan MA
IPC分类号: H01L29/66 , H01L29/786
CPC分类号: H01L29/6675 , H01L29/78696 , H01L29/78672
摘要: A method for manufacturing a display substrate is provided. The method includes: forming a first active layer arranged in the NMOS transistor region and a second active layer arranged in the PMOS transistor region on the base substrate; coating one side, facing away from the base substrate, of the first active layer and one side, facing away from the base substrate, of the second active layer with a first photoresist layer, forming a first pattern layer by patterning the first photoresist layer to expose at least two ends of the first active layer; forming N-type heavily doped regions by performing N-type heavy doping on the two ends of the first active layer with the first pattern layer as a mask; forming a second pattern layer by processing the first pattern layer to expose at least a middle region of the first active layer.
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公开(公告)号:US20210142709A1
公开(公告)日:2021-05-13
申请号:US17052893
申请日:2019-12-24
发明人: Libin LIU , Can ZHENG , Yu FENG , Jiangnan LU
IPC分类号: G09G3/20
摘要: A gate driving circuit and a display substrate are provided. The gate driving circuit may provide a driving signal to gate lines, and include output units cascaded to each other and having a same circuit structure. Each output unit includes at least one output transistor-outputs the driving signal to a corresponding gate line through the output transistor, and all the at least one output transistor is coupled to one gate line. The output units are classified first and second output units. A number of sub-pixels coupled to the gate line corresponding to each first output unit is greater than a number of sub-pixels coupled to the gate line corresponding to each second output unit, and an output capability of at least one output transistor of the first output unit is greater than an output capability of a corresponding output transistor of the second output unit.
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公开(公告)号:US20210004106A1
公开(公告)日:2021-01-07
申请号:US16981153
申请日:2020-02-14
发明人: Xinguo Wu , Fengguo WANG , Zhixuan GUO , Hong LIU , Bo MA , Yu FENG , Shicheng SONG
摘要: A touch substrate includes a base, a plurality of touch electrodes arranged in an array on the base, and a plurality of signal lines disposed on a side of the plurality of touch electrodes proximate to or away from the base. The plurality of signal lines include a plurality of touch lines and a plurality of dummy touch lines. At least one of the plurality of touch electrodes is coupled to at least one of the plurality of touch lines. The at least one touch line is configured to transmit touch signals. The at least one touch electrode is coupled to at least one of the plurality of dummy touch lines.
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公开(公告)号:US20240046880A1
公开(公告)日:2024-02-08
申请号:US17763182
申请日:2021-04-01
IPC分类号: G09G3/3258 , G09G3/3233 , G09G3/3266
CPC分类号: G09G3/3258 , G09G3/3233 , G09G3/3266 , G09G2300/0819 , G09G2300/0842
摘要: The present disclosure relates to a pixel drive circuit, a driving method thereof, and a display panel, which relates to the field of display technology. The source, drain and gate of the drive transistor of the pixel drive circuit are respectively connected to the first node, the second node and the third node. The storage capacitor is connected to the third node. The first control unit is used for enabling a path between the second node and the fourth node in response to the first control signal. The second control unit is used for outputting the first power supply voltage to the first node in response to the light-emitting signal. The threshold compensation transistor is used for enabling a path between the second node and the third node in response to the second control signal. The material of the active region is a metal oxide semiconductor.
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公开(公告)号:US20240013699A1
公开(公告)日:2024-01-11
申请号:US18307853
申请日:2023-04-27
CPC分类号: G09G3/2074 , G09G3/32 , G09G2300/0408 , G09G2310/0208 , G09G2310/0262
摘要: Disclosed are a display panel and a display device. The display panel includes a base substrate, and a first display region and a second display region that are located on the base substrate, where the first display region includes a plurality of first sub-pixels and a plurality of transparent regions, the second display region includes a plurality of second sub-pixels, and a distribution density of the first sub-pixels is smaller that of the second sub-pixels; and an area occupied by the first sub-pixels is smaller than that occupied by the second sub-pixels.
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公开(公告)号:US20230351956A1
公开(公告)日:2023-11-02
申请号:US17636374
申请日:2021-03-24
发明人: Libin LIU , Li WANG , Yu FENG , Lujiang HUANGFU
IPC分类号: G09G3/3233
CPC分类号: G09G3/3233 , G09G2300/0861 , G09G2300/0842 , G09G2300/0819 , G09G2310/08 , G09G2330/021 , G09G2300/0426
摘要: Embodiments of the present disclosure provide an array substrate and related display panel and display device. An array substrate, comprises: a substrate; a plurality of sub-pixels arranged in multiple rows and multiple columns provided on the substrate, at least one of the plurality of sub-pixels comprising pixel circuits, each of the pixel circuits comprising a driving circuit, a voltage stabilizing circuit, and a driving reset circuit, wherein the driving circuit is configured to provide a driving current to a light-emitting device, the voltage stabilizing circuit comprises a first voltage stabilizing circuit and a second voltage stabilizing circuit, the first voltage stabilizing circuit is configured to conduct a control terminal of the driving circuit with the driving reset circuit, the second voltage stabilizing circuit is configured to stabilize a voltage at the control terminal of the driving circuit, and the driving reset circuit is configured to reset the control terminal of the driving circuit.
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