公开(公告)号：US20190206503A1

公开(公告)日：2019-07-04

申请号：US16105274

申请日：2018-08-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Yuanbo ZHANG ,  Xiaolin WANG ,  Zhuo XU ,  Shuai CHEN ,  Zhulin LIU

IPC: G11C19/28 ,  G09G3/20

CPC classification number: G11C19/287 ,  G09G3/20 ,  G09G2310/0286 ,  G09G2310/08

Abstract: A shift register includes a pull-up control circuit, a pull-up circuit, a pull-down control circuit, a pull-down circuit, and a reset circuit. The pull-down circuit is connected to the pull-down node, the pull-up node, a second control terminal, a first voltage terminal, and a signal output terminal, and is configured to pull down potentials of the pull-up node and the signal output terminal to a potential of the first voltage terminal under the control of the pull-down node; moreover, the pull-down circuit is further configured to pull down potentials of the pull-up node and the signal output terminal to a potential of the first voltage terminal under the control of a signal from the second control terminal.

公开(公告)号：US20160266454A1

公开(公告)日：2016-09-15

申请号：US14402966

申请日：2013-12-05

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaolin WANG

IPC: G02F1/1343 ,  H01L27/12 ,  G02F1/1368 ,  G02F1/1333 ,  G02F1/1362

CPC classification number: G02F1/134363 ,  G02F1/133345 ,  G02F1/1337 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134345 ,  G02F2001/134372 ,  H01L27/124 ,  H01L27/1248

Abstract: An array substrate includes: a base substrate; a sub-pixel region on the base substrate in which a first electrode and a second electrode are provided, one of the first electrode and the second electrode being a common electrode, the other being a pixel electrode; an insulating layer between the first electrode and the second electrode; the sub-pixel region comprises right opposite overlapping regions between the first electrode and the second electrode that are disposed in different layers and non-right opposite overlapping regions; and hollowed-out regions are provided at least in regions of the insulating layer that correspond to the non-right opposite overlapping regions. The array substrate is used to provide a liquid crystal panel with low power dissipation.

Abstract translation: 阵列基板包括：基底基板; 在基底基板上设置有第一电极和第二电极的子像素区域，第一电极和第二电极中的一个是公共电极，另一个是像素电极; 第一电极和第二电极之间的绝缘层; 子像素区域包括位于不同层和非右对置重叠区域中的第一电极和第二电极之间的右对置重叠区域; 并且至少在与非右对置重叠区域对应的绝缘层的区域中设置有挖空区域。 阵列基板用于提供具有低功耗的液晶面板。

公开(公告)号：US20160252787A1

公开(公告)日：2016-09-01

申请号：US14402946

申请日：2013-11-30

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiaolin WANG

IPC: G02F1/1343 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1333 ,  G02F1/1362

CPC classification number: G02F1/134363 ,  G02F1/133345 ,  G02F1/136286 ,  G02F2001/134345 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/78633

Abstract: An array substrate includes: a base substrate; a sub-pixel region on the base substrate in which a first electrode and a second electrode are disposed; and a first insulating layer between the first electrode and the second electrode for insulating the first electrode and the second electrode. One of the first electrode and the second electrode is a common electrode and the other is a pixel electrode. A surface of at least one of the first electrode and the second electrode is a curved surface. The array substrate is intended to provide a liquid crystal panel and a display device with high light transmittance in sub-pixel regions. A manufacturing method of an array substrate is further disclosed.

Abstract translation: 阵列基板包括：基底基板; 在基底基板上设置有第一电极和第二电极的子像素区域; 以及在第一电极和第二电极之间的第一绝缘层，用于使第一电极和第二电极绝缘。 第一电极和第二电极中的一个是公共电极，另一个是像素电极。 第一电极和第二电极中的至少一个的表面是曲面。 阵列基板旨在提供在子像素区域中具有高透光率的液晶面板和显示装置。 进一步公开了阵列基板的制造方法。