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公开(公告)号：US20170221439A1
公开(公告)日：2017-08-03
申请号：US15233487
申请日：2016-08-10
发明人： Mo CHEN , Jinliang LIU , Jian ZHAO
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G3/2096 , G09G3/3266 , G09G3/3677 , G09G2300/0426 , G09G2310/0267 , G09G2310/0286 , G09G2310/08
摘要： A gate driver unit, a gate driver circuit and a driving method thereof, and a display device are disclosed. In the gate driver unit, an input module is configured to pull up a voltage at a pulling-up node to a high level, the pulling-up node being a connection node of an output end of the input module and a control end of an output module; the output module is configured to output a gate driving signal under a control of a second dock signal; a pulling-up module is configured to reverse the voltage at the pulling-up node under a control of a fourth clock signal; a pulling-down module is configured to reverse a voltage at an output end of the output module under a control of the second clock signal; and a reset module is configured to reset the output end of the output module.
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公开(公告)号：US20190012976A1
公开(公告)日：2019-01-10
申请号：US15750417
申请日：2017-08-14
发明人： Mo CHEN , Yang ZHANG , Jilei GAO , Wuxia FU
摘要： The present disclosure provides a shift register unit, which includes an input circuit, a reset circuit, a noise reduction circuit, and an output circuit. The input circuit is configured to control a voltage of a first node based on a first input signal and a second input signal, and control a voltage of a second node based on a first voltage and the voltage of the first node. The reset circuit is configured to reset the voltage of the first node and the voltage of the second node. The noise reduction circuit is configured to maintain a reset voltage of the first node and a reset voltage of the second node. The output circuit is configured to provide, for an output terminal of the output circuit, a second clock signal from a second clock signal terminal or the second voltage. The shift register unit is composed of switch elements.
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13.发明申请公开(公告)号：US20190012970A1
公开(公告)日：2019-01-10
申请号：US15746753
申请日：2017-08-10
发明人： Mo CHEN , Jinliang LIU , Wuxia FU , Huanyu LI , Songmei SUN
摘要： A shift register circuit is disclosed that includes an input control circuit configured to set a first node at a first potential in response to an active pulse signal from a signal input terminal, an output control circuit configured to supply a clock signal from a first clock signal terminal to a signal output terminal in response to the first node being at the first potential, the first potential being less than a potential of the active pulse signal and greater than or equal to a potential for maintaining operation of the output control circuit, and a reset circuit configured to supply a reference voltage from a reference voltage terminal to the first node and the signal output terminal in response to a reset signal.
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公开(公告)号：US20180315376A1
公开(公告)日：2018-11-01
申请号：US15740300
申请日：2017-06-28
发明人： Mo CHEN , Xiong XIONG , Jilei GAO , Songmei SUN
IPC分类号： G09G3/3258 , G09G3/3233 , G09G3/3266 , G09G3/3291 , H01L27/32
摘要： Disclosed is a pixel driving circuit, comprising a driving control circuit, a first driving circuit and a second driving circuit. The driving control circuit is configured to control one of the first driving circuit and the second driving circuit to be turned on under the condition the first scanning line outputs an effective voltage signal, and control the other of the first driving circuit and the second driving circuit to be turned on under the condition the second scanning line outputs an effective voltage signal. The first driving circuit is configured to drive the light emitting circuit to emit light under control of the driving control circuit. The second driving circuit is configured to drive the light emitting circuit to emit light under control of the driving control circuit.
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公开(公告)号：US20210335208A1
公开(公告)日：2021-10-28
申请号：US16473968
申请日：2019-01-14
发明人： Kai CHEN , Mo CHEN , Siying LU , Fangqing LI , Wenbo DONG
IPC分类号： G09G3/32
摘要： A shift register circuit and a method of driving the same, a gate driver circuit, an array substrate and a display device. The shift register circuit includes an input subcircuit and a signal output subcircuit. The input subcircuit includes: a control module, which is configured to output a signal of the first voltage terminal to a voltage dividing node under a control of an input signal; an input module configured to output a signal of the voltage dividing node to the signal output subcircuit under a control of the control module; and a voltage dividing module, a resistance value of the voltage dividing module having a negative relationship with a temperature, and the signal output subcircuit is connected with an output terminal of the input module and configured to output a gate scan signal from an output signal terminal under a control of the input module.
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16.发明申请公开(公告)号：US20200243150A1
公开(公告)日：2020-07-30
申请号：US16551945
申请日：2019-08-27
发明人： Mo CHEN , Kai CHEN , Fei HAN , Fangqing LI , Wangdi WU
摘要： A shift register including an input circuit, an output circuit, a first output control circuit, a second output control circuit, a reset circuit, a first reset control circuit, a second reset control circuit, and an energy-storing circuit. The first output control circuit is configured to transfer a clock signal present at a third clock signal terminal to a first node in response to the clock signal at the third clock signal terminal being active. The second output control circuit is configured to transfer a voltage present at a first voltage terminal to the first node in response to a clock signal at a fourth clock signal terminal being active.
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17.发明申请公开(公告)号：US20190074302A1
公开(公告)日：2019-03-07
申请号：US15766570
申请日：2017-09-28
发明人： Jilei GAO , Xuebing JIANG , Songmei SUN , Peng WU , Jian ZHAO , Yang ZHANG , Mo CHEN
IPC分类号： H01L27/12 , H01L27/02 , H01L29/66 , H01L29/786
摘要： A thin film transistor, a manufacturing method thereof, an array substrate and a display panel are provided. The thin film transistor includes: a base substrate; and a gate electrode, a gate insulating layer, an active layer and a source/drain electrode layer which are on the base substrate. The source/drain electrode layer includes a source electrode and a drain electrode. The thin film transistor further includes a light blocking layer surrounding the active layer.
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